ST L4973 User Manual

Features
Up to 3.5 A step down converter
Operating input voltage from 8 V to 55 V
3.3 V and 5.1 V (±1%) fixed output, and
Frequency adjustable up to 300 kHz
Voltage feed forward
Zero load current operation (min. 1 mA)
Internal current limiting (pulse by pulse and
HICCUP mode)
Precise 5.1 V (1.5%) reference voltage
externally available
Input/output synchronization function
Inhibit for zero current consumption (100 mA
typ. at V
Protection against feedback disconnection
Thermal shutdown
Output over voltage protection
Soft-start function

Figure 1. Internal schematic diagram

= 24 V)
CC
VCC (8V to 55V)
C
IN
7
R
OSC
C2
1 4,5,6,10
13,14,15
L4973
3.5 A step down switching regulator
DIP-18 (12+3+3) SO-20 (12+4+4)
Description
The L4973 is a step down monolithic power switching regulator delivering 3.5 A at fixed voltages of 3.3 V or 5.1 V and using a simple external divider output adjustable voltage up to 50V. Realized in BCD mixed technology, the device uses an internal power D-MOS transistor (with a typical R high efficiency and very fast switching times. Switching frequency up to 300 kHz are achievable (the maximum power dissipation of the packages must be observed). A wide input voltage range between 8 V to 55 V and output voltages regulated from 3.3 V to 40 V cover the majority of the today applications. Features of this new generation of DC-DC converter includes pulse by pulse current limit, hiccup mode for output short circuit protection, voltage feed forward regulation, soft-start, input/output synchronization, protection against feedback loop disconnection, inhibit for zero current consumption and thermal shutdown. Packages available are in plastic dual in line, DIP­18 (12+3+3) for standard assembly, and SO20 (12+4+4) for SMD assembly.
C
8
L4973
16
12
BOOT
9
3
2
11
17
of 0.15 Ω) to obtain very
DS(on)
VO(3.3V or 5.1V)
L1
R
C
OSC
D97IN554A
COMP
C
SS
C
COMP
D1
C
OUT
February 2009 Rev 18 1/28
www.st.com
28
Contents L4973
Contents
1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5 Evaluation board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
6 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
8 Application ideas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
10 Order code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2/28
L4973 Block diagram
(x)

1 Block diagram

Figure 2. Block diagram

INH
ZERO CURRENT
INHIBIT
VREF
GOOD
5.1V
3.3V
V5.1
INTERNAL
REFERENCE
INTERNAL
SUPPLY
V
CC
5.1V
V
CC
8(9)7(8)16(18)10(11)
CBOOT
CHARGE
SS
COMP
VFB
SYNC
17(19)
11(12)
5.1V +
3.3V
E/A
-
12(13)
18(20)
Pin x = Powerdip
= S020
Pin
SOFT
START
THERMAL
SHUTDOWN
-
PWM
+
OSCILLATOR
1(1) 2(2) 3(3)

2 Pin settings

2.1 Pin connection

Figure 3. Pin connection (top view)

HICCUP CURRENT
LIMITING
CURRENT
LIMITING
R
SQQ
4,5,6,13,14,15
(4,5,6,7,14,15,16,17)
DRIVER
BOOT
9(10)
OUTOUTGNDOSC
D94IN161B
OSC
OUT
OUT
GND
GND
GND
V
CC
V
CC
BOOT
1
2
3
4
5
6
7
8
9 INH
D94IN162A
17
16
15
14
13
12
11
10
SYNC18
SS
V5.1
GND
GND
GND
VFB
COMP
OSC
OUT
OUT
GND
GND
GND
GND
V
CC
V
CC
BOOT INH
2
3
4
5
6
7
8
9
10
D94IN163A
DIP -18 (12+3+3) SO20 (12+4+4)
3/28
20
19
18
17
16
15
14
13
12
11
SYNC1
SS
V5.1
GND
GND
GND
GND
VFB
COMP
Pin settings L4973

2.2 Pin description

Table 1. Pin description

N° Pin
Name Description
DIP-18 SO-20
11 12 COMP E/A output to be used for frequency compensation
A logic signal (active high) disables the device (sleep
10 11 INH
mode operation). If not used it must be connected to GND; if floating the device is disabled.
9 10 BOOT
18 20 SYNC Input/Output synchronization.
7,8 8,9 V
2,3 2,3 OUT Stepdown regulator output.
12 13 VFB
16 18 V5.1 Reference voltage externally available.
4,5,6
13,14,15
1 1 OSC
4,5,6,7
14,15,16,17
CC
GND Signal ground
A capacitor connected between this pin and the output allows to drive the internal D-MOS.
Unregulated DC input voltage
Stepdown feedback input. Connecting the output directly to this pin results in an output voltage of 3.3 V for the L4973V3.3 and 5.1 V for L4973V5.1. An external resistive divider is required for higher output voltages. For output voltage resistive divider is required for higher output voltages. For output voltage less than 3.3 V, see
Note: 1 and Figure 33.
An external resistor connected between the unregulated input voltage and Pin 1 and a capacitor connected from Pin 1 to ground fixes the switching frequency. (Line feed forward is automatically obtained)
Note: 1 The maximum power dissipation of the package must be observed.
4/28
L4973 Electrical data

3 Electrical data

3.1 Maximum ratings

Table 2. Absolute maximum ratings

Symbol
Parameter Value Unit
DIP-18 S0-20
V
V
V
I
V
V
V
V
V
7,V8
2,V3
2,I3
9-V8
V
V
V2,V
I
Input voltage 58 V
9,V8
Output DC voltage
3
Output peak voltage at t = 0.1 μs f = 200 kHz
Maximum output current int. limit.
2,I3
V10-V8 14 V
11
17
12
18
10
V
9
V
V
V
V
V
Bootstrap voltage 70 V
10
Analogs input voltage (V
12
Analogs input voltage (VCC = 24 V) 13 V
19
(VCC = 20 V)
13
(VCC = 20 V)
20
Inhibit
11
= 24 V) 12 V
CC
-0.3
V
-0.3
DIP 12+3+3 Power dissipation a Tpins 90 °C
= 70 °C no copper area)
(T
P
tot
A
= 70 °C 4 cm copper area on PCB)
(T
A
SO-20
= 90 °C
pins
TJ,T
STG
Power dissipation a T
Junction and storage temperature -40 to 150 °C
-1
- 5
6
V V
V V
5.5
0.3
CC
V V
V V
5
1.3 2
W W W
4W

3.2 Thermal data

Table 3. Thermal data

Symbol Parameter DIP-18 SO-20 Unit
R
thJP
R
thJA
1. Package mounted on board
Maximum thermal resistance junction-pin 12 15 °C/W
Maximum thermal resistance junction-ambient 60
(1)
80
(1)
°C/W
5/28
Electrical characteristics L4973

4 Electrical characteristics

Table 4. Electrical characteristics
(Refer to the test circuit,V R
= 20 kΩ; unless otherwise specified)
OSC
Symbol Parameter Test condition Min Typ Max Unit
Dynamic characteristics
Input voltage range
Output voltage L4973V5.1
Output voltage L4973V3.3
(1)
VO = V
I
I to 55 V
I
I to 40 V
= 1 A 5.05 5.1 5.15 V
O
= 0.5 A to 3.5 A VCC = 8 V
O
= 1 A 3.326 3.36 3.393 V
O
= 0.5 A to 3.5 A VCC = 8 V
O
= 24 V; TJ = 25 °C, C
CC
to 40 V; IO = 3.5A
REF
= 2.7 nF;
OSC
(2)
855V
5.00 5.1 5.20 V
(2)
4.95 5.1 5.25 V
3.292 3.36 3.427 V
(2)
3.26 3.36 3.46 V
R
DS(on
)
Maximum limiting current
η Efficiency
Switching frequency
Supply voltage ripple rejection
Switching frequency
Δf
stability vs., supply
s
w
voltage
Reference section
Reference voltage
Line regulation
Load regulation
VCC = 10.5 V IO = 3.5 A
= 8 V to 55 V
V
CC
V
= 5.1 V; IO = 3.5 A 90 %
O
= 3.3 V; IO = 3.5 A 85 %
V
O
= VCC+2 V
V
i
= 1 A; f
I
O
V
CC
I
ref
ripple
= 8 V to 55 V 2 5 %
= 0 to 20 mA;
RMS VO
= 100 Hz
= V
VCC = 8 to 55 V
I
= 0 mA;
ref
VCC = 8 to 55 V
V
= 0 to 5 mA;
ref
VCC = 0 to 20 mA
ref
(2)
0.35 Ω
(2)
3.8 4.5 5.5 A
4 4.5 5.5 A
(2)
90 100 110 kHz
;
60 dB
5.025 5.1 5.175 V
(2)
4.950 5.1 5.250 V
5 10 mV
2
1025mV
6
0.15 0.22 Ω
mV
Short circuit current 30 65 100 mA
6/28
L4973 Electrical characteristics
Table 4. Electrical characteristics (continued)
(Refer to the test circuit,V R
= 20 kΩ; unless otherwise specified)
OSC
Symbol Parameter Test condition Min Typ Max Unit
Soft-start
Soft-start charge current 30 45 60 μA
= 24 V; TJ = 25 °C, C
CC
= 2.7 nF;
OSC
Soft-start discharge current
Inhibit
High level voltage
Low level voltage
high level V
I
source
I
low level V
source
DC characteristics
Total operating quiescent current
Quiescent current Duty cycle = 0 2.7 4 mA
Total stand-by quiescent current
Error amplifier
High level output voltage 11.0 V
Low level output voltage 0.65 V
Source bias current 1 2 3 μA
Source output current 200 300 600 μA
Sink output current 200 300 μA
15 22 30 μA
(2)
3.0 V
= 3 V
INH
= 0.8 V
INH
(2)
(2)
10 16 50 μA
(2)
10 15 50 μA
0.8 V
Duty cycle = 50 % 4 6 mA
V
CC
V
CC
= 24 V; V
= 55 V; V
= 5 V 100 200 μA
INH
= 5 V 150 300 μA
INH
Supply voltage ripple rejection
DC open loop gain R
Transconductance
Oscillator section
Ramp valley 0.78 0.85 0.92 V
Ramp peak
Maximum duty cycle 95 97 %
= VFB
V
COMP
C
= 4.7 μF 1-5 mA load
REF
60 80 dB
current
= 50 60 dB
L
I
= -0.1 to 0.1 mA;
comp
= 6 V
V
comp
V
= 8 V
CC
VCC = 55 V
1.992.1
2.5 mS
2.3
9.6
10.2VV
7/28
Electrical characteristics L4973
Table 4. Electrical characteristics (continued)
(Refer to the test circuit,V R
= 20 kΩ; unless otherwise specified)
OSC
Symbol Parameter Test condition Min Typ Max Unit
= 24 V; TJ = 25 °C, C
CC
= 2.7 nF;
OSC
Maximum frequency
Sync function
High input voltage VCC = 8 V to 55 V 3.5 V
Low input voltage V
Slave sink current 0.15 0.25 0.45 mA
Master output amplitude I
Output pulse width No load, V
1. Pulse testing with a low duty cycle
2. Specifications referred to T
from -40 °C to 125 °C.
J
Duty cycle = 0%; R
=13 kΩ; C
OSC
= 8 V to 55 V 0.9 V
CC
= 3 mA 4 4.5 V
source
sync
= 820 pF;
OSC
= 4.5 V 0.20 0.35 μs
300 kHz
8/28
L4973 Evaluation board

5 Evaluation board

Figure 4. Evaluation board circuit

SYNCHSYNCH
U1
U1
OSC
SS
V5.1
L4973 DIP 18
L4973 DIP 18
R5NMR5 NM
3
8
VCC7VCC
JP1JP1
2
10
INH
COMP
11
C4 22nC422n
C5
R2
150pC5150p
15kR215k
VinVin
470u 63v
470u 63v
GNDGND
R1 15kR115k
C10
C10
C9
220nC9220n
C2
C1
470nC2470n
2.7nC12.7n
1
17
16
C3A1uC3A
C3NMC3
1u
NM
Table 5. Component list (fsw = 150 kHz, V
18
SYNC
R6 NMR6 NM
1
C8 220nC8 220n
9
2
OUT
3
BOOT
OUT
15
GND GND GND GND GND GND
VFB
12
signal GND
GND plane
14 13 6 5 4
OUT
Q2NMQ2
NM
signal GND
= 5 V)
L1 68uHL1 68uH
R7NMR7
NM
D1 STPS5L60D1STPS5L60
1 2
C6NMC6
NM
C11
C11
C7NMC7 NM
150u 50v
150u 50v
C12
C12 150u 50v
150u 50v
VoutVout
R3
2.7kR32.7k C14NMC14
NM
C13NMC13 NM
R4
4.99kR44.99k
GNDGND
Reference Description Part number Manufacturer
R1 Resistor 15 kΩ 1%
R2 Resistor 15 kΩ 1%
R3 Resistor 2.7 kΩ 1%
R4 Resistor 4.99 kΩ 1%
R5 Not mounted
R6 Not mounted
R7 Not mounted
C1 Capacitor 2.7 nF 5%
C2 Capacitor 470 nF 5%
C3 Capacitor 1 μF 5%
C4 Capacitor 22 nF 5%
C5 Capacitor 150 pF 5%
C6 Not mounted
C7 Not mounted
C8 Capacitor 220 nF 5%
C9 Capacitor 220 nF 5%
C10 Capacitor 470 μF 63V EKY-630ELL471ML20S Nippon Chemi-con
9/28
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