ST L4963, L4963D User Manual

L4963
®
1.5A OUTPUT LOAD CURRENT
5.1 TO 36V OUTPUT VOLTAGE RANGE DISCONTINUOUS VARIABLE FREQUENCY MODE PRECISE (+/–2%) ON CHIP REFERENCE VERY HIGH EFFICIENC Y VERY FEW EXTERNAL COMPONENTS NO FREQ. COMPENSATION REQUIRED RESET AND POWER FAIL OUTPUT FOR MI­CROPROC ESSOR INTERNAL CURRENT LIMITING THERMAL SHUTDOWN
DESCRIPTION
The L4 963 is a m onolith ic power switching r e gulator delivering 1.5A at 5.1 V. The output v o l t ag e is a dj ust­able from 5.1V to 36V, working in discontinuous variable frequency mode. Features of the device include re mote inhibit, internal curr ent limiting and thermal protecti on, reset and power fail outp uts for microprocessor.
L4963D
1.5A SWITCHING REGULATOR
Powerdip12+3+3
ORDERING NUMBERS:
L4963W L4963D
The L4963 is mounted in a 12+3+3 lead Powerdip (L4963) and SO20 large (L4963D) plastic pack­ages and requires very few external components.
SO20
BLOCK DIAGRAM
June 2000
1/17
This is a dvanced i nformation on a new product now in development or und ero gi n evaluat i on . Details ar e s u bj ect to ch ange with ou t notice.
L4963 - L4963D
ABSOLUTE MAXIMUM RATINGS
Symbol
SO20 Powerdip
V
i
V
3–V2
V
2
V
2
V
8
, V
V
9
11
V
10
, V
V
13
18
, V
V
19
20
V8, V
V12, V V17, V
P
tot
T
, T
stg
j
P
tot
PIN CONNECTION
V
7
10
V
9
16
18
(top view)
Parameter Value Unit
Input Voltage (pin 1 and pin 3 connected togheter) Input to Output Voltage Difference Negative Output DC Voltage Negative Output Peak Voltage at t=0.2 µs, f=50kHz Power Fail Input Reset and Power Fail Output Reset Delay Input Feedback and Inhibit Inputs Oscillator Inputs Total Power Dissipation Tpins ≤ 90°C (Power DIP)
(T
= 70°C no copper area on PCB)
amb
= 70°C, 4cm2 copper area on PCB)
(T
amb
Storage & Junction Temperature (Tamb = 70°C 6cm2 copper area on PCB)
Total Power Dissipation Tpins ≤90°C (SO20L)
47 V 47 V –1 V –5 V 25 V
V
i
5.5 V 7V
5.5 V 5
1.3 2
–40 to 150
1.45
W W W
C
°
W
4W
Powerdip18
SO20
2/17
PIN FUNCTIONS
SO20L Power DIP Name Description
L4963 - L4963D
11 22
33
4, 5, 6, 7
14, 15, 16, 17
4, 5, 6
13, 14, 15
87
98
10 9
11 10
12 11
13 12
18 16
SIGNAL SUPPLY VOLTAGE Must be Connected to pin 3 OUTPUT Regulator output
SUPPLY VOLTAGE
Unregulated voltage input. An internal regulator powers the internal logic.
GROUND Common ground terminal
Input of the power fail circuit. The threshold can be
POWER FAIL INPUT
modified introducing an external voltage divider between the Supply Voltage and GND.
POWER FAIL OUTPUT
RESET DELAY
RESET OUTPUT
Open collector power fail signal output. This output is high when the supply voltage is safe.
A capacitor connected between this terminal and ground determines the reset signal delay time.
Open collector reset signal output. This output is high when the output voltage value is correct.
REFERENCE VOLTAGE Reference voltage output.
Feedback terminal of the regulation loop.
FEEDBACK INPUT
The output is connected directly to this terminal for
5.1V operation; it is connected via a divider for higher voltages.
INHIBIT INPUT
TTL level remote inhibit. A logic low level on this input disables the device.
19 17
C OSCILLATOR
between this terminal and ground modifies the maximum oscillator frequency.
Oscillator waveform. A capacitor connected
20 18
R OSCILLATOR FREQ.
A resistor connected between this terminal and ground defines the maximum switching frequency.
THERMAL DATA
Symbol Parameter SO20 Powerdip Unit
R
th j-pins
R
th j-amb
(*) See Fig. 28
Thermal Resistance Junction to Pins max. Thermal Resistance Junction to Ambient (*) max.
15 12 85 80
C/W
°
C/W
°
3/17
L4963 - L4963D
CIRCUIT DESCRIPTION (Refer to Block Dia­gram)
The L4963 is a monolithic stepdown regulator pro­viding 1.5A at 5.1V working in discontinuous vari­able frequency mode. In normal operation the device resonates at a frequency depending primar­ily on the inductance value, the input and output voltage and the load current. The maximum switch­ing however can be limited by an internal oscillator , which can be programmed by only one external resistor.
The fondamental regulation loop consists of two comparators, a precision 5.1V on-chip reference and a drive latch. Briefly the operation is as follows: when the choke ends its discharge the catch free­wheeling recirculation filter diode begins to come out of forward conduction so the output voltage of the device approaches ground. When the output voltage reaches –0.1V the internal comparator sets the latch and the power stage is turned on. Then the inductor current rises linearly until the voltage sensed at the feedback input reaches the 5.1V reference.
The second comparator then resets the latch and the output stage is turned off. The current in the choke falls linearly until it is fully discharged, then the cycle repeats. Closing the loop directly gives an output voltage of 5.1V. Higher output voltages are
obtained by inserting a voltage divider and this method of control requires no frequency compen­sation network. At output voltages greater than
5.1V the available output current must be derated due to the increased power dis sipation of the de­vice.
Output overload protection is provided by an inter­nal current limiter. The load current is sensed by a on-chip metal resistor connected to a comparator which resets the latch and turns off the power stage in overload condition. The reset circuits (s ee fig. 1) generates an output high signal when the output voltage value is correct. It has an open collector output and the output signal delay time can be programmed with an external capacitor. A power­fail circuit is also available and is used to monitor the supply voltage. Its out put goes h igh when the supply voltage reaches a pre-programmed tres hold set by a voltage divider to its input from the supply to ground. With the input left open the threshold is approximately equal to 5.1V. The output of the power fail is an open collector.
A T TL level inhibit is provided for applications suc h as remote on/off control. This input is activated by a low logic level and disables circuits operation.
The thermal overload circuit disables the device when the junction temperature is about 150°C and has hysteresis to prevent unstable conditions.
Figure 1:
Reset and Power Fail Function
4/17
L4963 - L4963D
ELECTRICAL CHARACTERISTIC
(Refer to the te s t ci r cui t V
= 30V T
i
=
25°C unless oth erw is e spe cif ied )
j
Symbol Parameter Test Conditions Min. Typ. Max. Unit Fig.
DYNAMIC CHARACTERISTICS
V
o
V
i
V
12
I
12
V
OS12
V
o
V
o
V
d
I
2L
I
o
SVR
V
11
V
11
V
11
η
T
sd
Output Voltage Range Vi = 46V Io = 0.5A Input Voltage Range Vo = V
to 36V Io = 0.5A 9 46 V 2
ref
Feedback Voltage Vi = 9 to 46V Io = 0.5A 5 5.1 5.2 V 2 Input Bias Current
Vi = 15V V12 = 6V V
= 5V
17f
Input Offset Voltage Line Regulation
Load Regulation Dropout Voltage Between
pin 3 and pin 2 Current Limiting Maximum Operating Load
Current Supply Voltage Ripple
Rejection Reference Voltage Average Temperature
Coefficient of Ref. Volt. V
Line Regulation Vi = 9 to 46V
ref
V
Line Regulation
ref
Efficiency I
Vi = 9 to 46V Vo = V Io = 0.5A
Vo = V Io = 0.5 to 1.5A
I2 = 3A
= 20V
V
i
Vi = 9 to 46V
= V
V
o
Vi = 9 to 46V Vo = V V
= 2Vrms Vo = V
i
fripple = 100Hz Io = 1.5A Vi = 9 to 46V
O < I11 < 5mA T
= 0 to 125 °C
j
I
= 0 to 5mA
ref
Vi = 46V R
= 1.5A Vo = V
o
ref
to 28V
ref
osc
= 51K
ref
ref
ref
ref
Thermal Shutdown Junction Temperature
Hysteresis
V
ref
520
36 V 2
A3a
µ
510mV3a
15 50 mV 2
15 45 mV 2
1.5 2 V 2
3.5 6.5 A 2
1.5 A 2
50 56 dB 2
5 5.1 5.2 V 3a
0.4 mV/°C– 10 20 mV 3a
65 69
715mV3a
65 75 % 2
145 150
30
C–
°
C–
°
DC CHARACTERISTICS
I
q
Quescent Drain Current
INHIBIT
V
16L
V
16H
I
16L
I
16L
Low Input Voltage Vi = 9 to 46V High Input Voltage Vi = 9 to 46V Input Current with Low
Input Voltage Input Current with High
Input Voltage
Vi = 46V Io = 0mA
V16 = 0.8V
V16 = 2V
V
= V12 = 0 14 20 mA 3a
16
= V
V
16
V12 = 5.3V
ref
11 16 mA 3a
0.3 0.8 V 2
25.5V2 50 100
10 20
A2
µ
A2
µ
5/17
L4963 - L4963D
ELECTRICAL CHARACTERISTIC
(Continued)
Symbol Parameter Test Conditions Min. Typ. Max. Unit Fig.
RESET
V
12
V
12
V
9D
V
9F
–I
9SO
I
9SI
I
10
V
10
Rising Threshold Voltage Vi = 9 to 46V
Falling Threshold Voltage Vi = 9 to 46V Delay Rising Thereshold
Voltage
V7 = OPEN
Delay Falling Thereshold Voltage
Delay Source Current V9 = 4.7V V12 = 5.3V
V
–150
V
–150
4.3 4.5 4.7 V 3b
11.52 V3b
70 110 140 Delay Sink Current V9 = 4.7V V12 = 4.7V 10 mA 3b Output Leakage Current Vi = 46V V7 = 8.5V
50 Output Saturation Volt. I10 = 15mA; VI = 3 to 46V
V
ref
–100
V
ref
–200
V
ref
ref
ref
–50 V
ref
–250
mV 3b
mV 3b
A3b
µ
A3b
µ
0.4 V 3b
POWER FAIL
V
R
V
F
V
7
V
7
V
s
I
s
Rising Threshold Voltage Pin7 = open Falling Threshold Voltage Pin7 = open Rising Threshold Voltage Vi = 20V Falling Threshold Voltage Vi = 20V Output Saturation Volt. Ia = 5mA Output Leakage Current Vi = 46V
17.5 19 20.5 V 3C
14.25 15 15.75 V 3c
4.14 4.5 4.86 V
3.325 3.5 3.675 V
0.4 V 3c 50
A3c
µ
OSCILLATOR
f
f
Oscillator Frequency R
Oscillator Frequency
= 51K
T
= 9 to 46V
V
I
Tj = 0 to 125°C RT = 51K
46 60 79 kHz
42 83 kHz
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