ST L4963, L4963D User Manual

	L4963
®	L4963D

1.5A SWITCHING REGULATOR

1.5A OUTPUT LOAD CURRENT

5.1 TO 36V OUTPUT VOLTAGE RANGE

DISCONTINUOUS VARIABLE FREQUENCY MODE

PRECISE (+/–2%) ON CHIP REFERENCE

VERY HIGH EFFICIENCY

VERY FEW EXTERNAL COMPONENTS

NO FREQ. COMPENSATION REQUIRED

RESET AND POWER FAIL OUTPUT FOR MICROPROCESSOR

INTERNAL CURRENT LIMITING THERMAL SHUTDOWN

DESCRIPTION

The L4963 is a monolithic power switching regulator delivering 1.5A at 5.1V. The output voltage is adjustable from 5.1V to 36V, working in discontinuous variable frequency mode. Features of the device include remote inhibit, internal current limiting and thermal protection, reset and power fail outputs for microprocessor.

Powerdip12+3+3	SO20
ORDERING NUMBERS:
L4963W	L4963D

The L4963 is mounted in a 12+3+3 lead Powerdip (L4963) and SO20 large (L4963D) plastic packages and requires very few external components.

BLOCK DIAGRAM

June 2000

1/17

L4963 - L4963D

ABSOLUTE MAXIMUM RATINGS

	Symbol		Parameter	Value	Unit
SO20		Powerdip
	Vi		Input Voltage (pin 1 and pin 3 connected togheter)	47	V
	V3–V2		Input to Output Voltage Difference	47	V
	V2		Negative Output DC Voltage	–1	V
	V2		Negative Output Peak Voltage at t=0.2 μs, f=50kHz	–5	V
V8		V7	Power Fail Input	25	V
V9, V11		V8, V10	Reset and Power Fail Output	Vi
V10		V9	Reset Delay Input	5.5	V
V13, V18		V12, V16	Feedback and Inhibit Inputs	7	V
V19, V20		V17, V18	Oscillator Inputs	5.5	V
	Ptot		Total Power Dissipation Tpins ≤ 90°C (Power DIP)	5	W
			(Tamb = 70°C no copper area on PCB)	1.3	W
			(Tamb = 70°C, 4cm2 copper area on PCB)	2	W
	Tstg, Tj		Storage & Junction Temperature	–40 to 150	°C
			(Tamb = 70°C 6cm2 copper area on PCB)	1.45	W
	Ptot		Total Power Dissipation Tpins ≤90°C (SO20L)	4	W

PIN CONNECTION (top view)

Powerdip18

SO20

2/17

				L4963 - L4963D
	PIN FUNCTIONS
	SO20L	Power DIP	Name	Description
	1	1	SIGNAL SUPPLY VOLTAGE	Must be Connected to pin 3
	2	2	OUTPUT	Regulator output
	3	3	SUPPLY VOLTAGE	Unregulated voltage input. An internal regulator
				powers the internal logic.
	4, 5, 6, 7	4, 5, 6	GROUND	Common ground terminal
	14, 15, 16, 17	13, 14, 15
	8	7		Input of the power fail circuit. The threshold can be
			POWER FAIL INPUT	modified introducing an external voltage divider
				between the Supply Voltage and GND.
	9	8	POWER FAIL OUTPUT	Open collector power fail signal output. This output
				is high when the supply voltage is safe.
	10	9	RESET DELAY	A capacitor connected between this terminal and
				ground determines the reset signal delay time.
	11	10	RESET OUTPUT	Open collector reset signal output. This output is
				high when the output voltage value is correct.
	12	11	REFERENCE VOLTAGE	Reference voltage output.
				Feedback terminal of the regulation loop.
	13	12	FEEDBACK INPUT	The output is connected directly to this terminal for
				5.1V operation; it is connected via a divider for
				higher voltages.
	18	16	INHIBIT INPUT	TTL level remote inhibit. A logic low level on this
				input disables the device.
	19	17	C OSCILLATOR	Oscillator waveform. A capacitor connected
				between this terminal and ground modifies the
				maximum oscillator frequency.
	20	18	R OSCILLATOR FREQ.	A resistor connected between this terminal and
				ground defines the maximum switching frequency.

THERMAL DATA

Symbol	Parameter		SO20	Powerdip	Unit
Rth j-pins	Thermal Resistance Junction to Pins	max.	15	12	°C/W
Rth j-amb	Thermal Resistance Junction to Ambient (*)	max.	85	80	°C/W

(*) See Fig. 28

3/17

L4963 - L4963D

CIRCUIT DESCRIPTION (Refer to Block Diagram)

The L4963 is a monolithic stepdown regulator providing 1.5A at 5.1V working in discontinuous variable frequency mode. In normal operation the device resonates at a frequency depending primarily on the inductance value, the input and output voltage and the load current. The maximum switching however can be limited by an internal oscillator, which can be programmed by only one external resistor.

The fondamental regulation loop consists of two comparators, a precision 5.1V on-chip reference and a drive latch. Briefly the operation is as follows: when the choke ends its discharge the catch freewheeling recirculation filter diode begins to come out of forward conduction so the output voltage of the device approaches ground. When the output voltage reaches –0.1V the internal comparator sets the latch and the power stage is turned on. Then the inductor current rises linearly until the voltage sensed at the feedback input reaches the 5.1V reference.

The second comparator then resets the latch and the output stage is turned off. The current in the choke falls linearly until it is fully discharged, then the cycle repeats. Closing the loop directly gives an output voltage of 5.1V. Higher output voltages are

Figure 1: Reset and Power Fail Function

obtained by inserting a voltage divider and this method of control requires no frequency compensation network. At output voltages greater than 5.1V the available output current must be derated due to the increased power dissipation of the device.

Output overload protection is provided by an internal current limiter. The load current is sensed by a on-chip metal resistor connected to a comparator which resets the latch and turns off the power stage in overload condition. The reset circuits (see fig. 1) generates an output high signal when the output voltage value is correct. It has an open collector output and the output signal delay time can be programmed with an external capacitor. A powerfail circuit is also available and is used to monitor the supply voltage. Its output goes high when the supply voltage reaches a pre-programmed treshold set by a voltage divider to its input from the supply to ground. With the input left open the threshold is approximately equal to 5.1V. The output of the power fail is an open collector.

A TTL level inhibit is provided for applications such as remote on/off control. This input is activated by a low logic level and disables circuits operation.

The thermal overload circuit disables the device when the junction temperature is about 150°C and has hysteresis to prevent unstable conditions.

4/17

L4963 - L4963D

ELECTRICAL CHARACTERISTIC (Refer to the test circuit Vi = 30V Tj = 25°C unless otherwise specified )

Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit	Fig.

DYNAMIC CHARACTERISTICS

	Vo	Output Voltage Range	Vi = 46V Io = 0.5A	Vref		36	V	2
	Vi	Input Voltage Range	Vo = Vref to 36V Io = 0.5A	9		46	V	2
	V12	Feedback Voltage	Vi = 9 to 46V Io = 0.5A	5	5.1	5.2	V	2
	I12	Input Bias Current	Vi = 15V V12 = 6V		5	20	μA	3a
			V17f = 5V
	VOS12	Input Offset Voltage			5	10	mV	3a
	Vo	Line Regulation	Vi = 9 to 46V Vo = Vref		15	50	mV	2
			Io = 0.5A
	Vo	Load Regulation	Vo = Vref		15	45	mV	2
			Io = 0.5 to 1.5A
	Vd	Dropout Voltage Between	I2 = 3A		1.5	2	V	2
		pin 3 and pin 2	Vi = 20V
	I2L	Current Limiting	Vi = 9 to 46V	3.5		6.5	A	2
			Vo = Vref to 28V
	Io	Maximum Operating Load	Vi = 9 to 46V Vo = Vref	1.5			A	2
		Current
	SVR	Supply Voltage Ripple	Vi = 2Vrms Vo = Vref	50	56		dB	2
		Rejection	fripple = 100Hz Io = 1.5A
	V11	Reference Voltage	Vi = 9 to 46V	5	5.1	5.2	V	3a
			O < I11 < 5mA
		Average Temperature	Tj = 0 to 125 °C		0.4		mV/°C	–
		Coefficient of Ref. Volt.
	V11	Vref Line Regulation	Vi = 9 to 46V		10	20	mV	3a
	V11	Vref Line Regulation	Iref = 0 to 5mA	65	7	15	mV	3a
			Vi = 46V Rosc = 51KΩ	69
	η	Efficiency	Io = 1.5A Vo = Vref	65	75		%	2
	Tsd	Thermal Shutdown		145	150		°C	–
		Junction Temperature
		Hysteresis			30		°C	–

DC CHARACTERISTICS

Iq	Quescent Drain Current	Vi = 46V		V16	= V12 = 0		14	20	mA	3a
		Io = 0mA
				V16 = Vref			11	16	mA	3a
				V12 = 5.3V
INHIBIT
V16L	Low Input Voltage	Vi = 9 to 46V				0.3		0.8	V	2
V16H	High Input Voltage	Vi = 9 to 46V				2		5.5	V	2
I16L	Input Current with Low	V16 = 0.8V					50	100	μA	2
	Input Voltage
I16L	Input Current with High	V16 = 2V					10	20	μA	2
	Input Voltage
										5/17

L4963 - L4963D

ELECTRICAL CHARACTERISTIC (Continued)

Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit	Fig.

RESET

	V12	Rising Threshold Voltage	Vi = 9 to 46V	Vref	Vref	Vref	mV	3b
				–150	–100	–50
	V12	Falling Threshold Voltage	Vi = 9 to 46V	Vref	Vref	Vref	mV	3b
				–150	–200	–250
	V9D	Delay Rising Thereshold	V7 = OPEN	4.3	4.5	4.7	V	3b
		Voltage
	V9F	Delay Falling Thereshold		1	1.5	2	V	3b
		Voltage
	–I9SO	Delay Source Current	V9 = 4.7V V12 = 5.3V	70	110	140	μA	3b
	I9SI	Delay Sink Current	V9 = 4.7V V12 = 4.7V	10			mA	3b
	I10	Output Leakage Current	Vi = 46V V7 = 8.5V	50			μA	3b
	V10	Output Saturation Volt.	I10 = 15mA; VI = 3 to 46V			0.4	V	3b
	POWER FAIL
	VR	Rising Threshold Voltage	Pin7 = open	17.5	19	20.5	V	3C
	VF	Falling Threshold Voltage	Pin7 = open	14.25	15	15.75	V	3c
	V7	Rising Threshold Voltage	Vi = 20V	4.14	4.5	4.86	V	–
	V7	Falling Threshold Voltage	Vi = 20V	3.325	3.5	3.675	V	–
	Vs	Output Saturation Volt.	Ia = 5mA			0.4	V	3c
	Is	Output Leakage Current	Vi = 46V			50	μA	3c
	OSCILLATOR
	f	Oscillator Frequency	RT = 51KΩ	46	60	79	kHz	–
	f	Oscillator Frequency	VI = 9 to 46V	42		83	kHz	–
			Tj = 0 to 125°C
			RT = 51KΩ

6/17