ST L293D, L293DD User Manual

L293D

®

PUSH-PULL FOUR CHANNEL DRIVER WITH DIODES

600mA OUTPUT CURRENT CAPABILITY
PER CHANNEL

1.2A PEAK OUTPUT CURRENT (non repeti­tive) PER CHANNEL

ENABLE FACILITY
OVERTEMPERATURE PROTECTION
LOGICAL "0" INPUT VOLTAGE UP T O 1.5 V

(HIGH NOISE IMMUN ITY)
INTERNAL CLAMP DIODES

DESCRIPTION

The Device is a monolithic integrated high volt­age, high current four channel driver designed to
accept standard DTL or TTL logic levels and drive
inductive loads (such as relays solenoides, DC
and stepping motors) and switching power tran­sistors.

To simplify use as two bridges each pair of chan­nels is equipped with an enable in put. A separate
supply input is provided for t he logic, allowing op­eration at a lower voltage and internal clamp di­odes are included.

This device is suitable for use in switching appli­cations at frequencies up to 5 kHz.

L293DD

SO(12+4+4) Powerdip (12+2+2)

ORDERING NUMBERS:

L293DD L293D

The L293D is assembled in a 16 lead plastic
packaage which has 4 center pins connected to­gether and used for heatsinking

The L293DD is assembled in a 20 lead surface
mount which has 8 center pins connected to­gether and used for heatsinking.

BLOCK DIAGRAM

July 2003

1/7

L293D - L293DD

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

V

S

V

SS

V

i

V

en

I

o

P

tot

T

, T

stg

Supply Voltage 36 V
Logic Supply Voltage 36 V
Input Voltage 7 V
Enable Voltage 7 V
Peak Output Current (100 µs non repetitive) 1.2 A
Total Power Dissipation at T
Storage and Junction Temperature – 40 to 150 °C

j

= 90 °C4W

pins

PIN CONNECTIONS

SO(12+4+4)

(Top view)

Powerdip(12+2+2)

THERMAL DATA

Symbol Decription DIP SO Unit

R

th j-pins

R

th j-amb

R

th j-case

(*) With 6sq. cm on board heatsink.

2/7

Thermal Resistance Junction-pins max. – 14 °C/W
Thermal Resistance junction-ambient max. 80 50 (*) °C/W
Thermal Resistance Junction-case max. 14 –

L293D - L293DD

ELECTRICAL CHARACTERISTICS

(for each channel, V

= 24 V, VSS = 5 V, T

S

= 25 °C, unless

amb

otherwise specified)

Symbol Parameter Test Conditions Min. Typ. Max. Unit

V

S

V

SS

I

S

I

SS

V

IL

V

IH

I

IL

I

IH

V

en L

V

en H

I

en L

I

en H

V

CE(sat)H

V

CE(sat)L

V

F

t

r

t

f

t

on

t

off

(*) See fig. 1.

Supply Voltage (pin 10) V

SS

Logic Supply Voltage (pin 20) 4.5 36 V
Total Quiescent Supply Current

(pin 10)

Total Quiescent Logic Supply
Current (pin 20)

Vi = L ; IO = 0 ; Ven = H 2 6 mA
Vi = H ; IO = 0 ; Ven = H 16 24 mA

= L 4 mA

V

en

Vi = L ; IO = 0 ; Ven = H 44 60 mA
Vi = H ; IO = 0 ; Ven = H 16 22 mA
Ven = L 16 24 mA

Input Low Voltage (pin 2, 9, 12,

– 0.3 1.5 V

19)
Input High Voltage (pin 2, 9,

12, 19)
Low Voltage Input Current (pin

VSS ≤ 7 V 2.3 V
VSS > 7 V 2.3 7 V
VIL = 1.5 V – 10 µA

2, 9, 12, 19)
High Voltage Input Current (pin

2.3 V ≤ VIH ≤ VSS – 0.6 V 30 100 µA

2, 9, 12, 19)
Enable Low Voltage

– 0.3 1.5 V

(pin 1, 11)
Enable High Voltage

(pin 1, 11)
Low Voltage Enable Current

VSS ≤ 7 V 2.3 V
VSS > 7 V 2.3 7 V
V

= 1.5 V – 30 – 100 µA

en L

(pin 1, 11)
High Voltage Enable Current

2.3 V ≤ V

≤ VSS – 0.6 V ± 10 µA

en H

(pin 1, 11)
Source Output Saturation

IO = – 0.6 A 1.4 1.8 V

Voltage (pins 3, 8, 13, 18)
Sink Output Saturation Voltage

IO = + 0.6 A 1.2 1.8 V

(pins 3, 8, 13, 18)
Clamp Diode Forward Voltage IO = 600nA 1.3 V
Rise Time (*) 0.1 to 0.9 V
Fall Time (*) 0.9 to 0.1 V

O
O

Turn-on Delay (*) 0.5 Vi to 0.5 V
Turn-off Delay (*) 0.5 Vi to 0.5 V

O
O

250 ns
250 ns
750 ns
200 ns

36 V

SS

SS

V

V

3/7