ST KBMF User Manual
®
EMI FILTER AND LINE TERMINATION
IPAD™
MAIN APPLICATIONS
EMI Filter and line termination for mouse and keyboard ports on:
■ Desktop computers
■ Notebooks
■ Workstations
■ Servers
FOR PS/2 MOUSE OR KEYBOARD PORTS
KBMF
FEATURES
■ Integrated low pass filters for Data and Clock
lines
■ Integrated ESD protection
■ Integrated pull-up resistors
■ Small package size
■ Breakdown voltage: V
= 6V min.
BR
DESCRIPTION
On the implementation of computer systems, the
radiated and conducted EMI should be kept within
the required levels as stated by the FCC
regulations. In addition to the requirements of
EMC compatibility, the computing devices are
required to tolerate ESD events and remain
operational without user intervention.
The KBMF implements a low pass filter to limit EMI
levels and provide ESD protection which exceeds
IEC 61000-4-2 level 4 standard. The device also
implements the pull up resistors needed to bias
the data and clock lines. The package is the
SOT23-6L which is ideal for situations where
board space is at a premium.
SOT23-6L
(Plastic)
Table 1: Order Code
Part Number Marking
KBMF01SC6 KM1
Figure 1: Functional Diagram
+Vcc
Dat In
Gnd
Clk In
Rs
CRpC
+Vcc
Rs
CRpC
Rs Rp C
Code 01 39Ω 4.7kΩ 120pF
Tolerance ±10% ±10% ±20%
Dat Out
+Vcc
Clk Out
BENEFITS
■ EMI / RFI noise suppression
■ ESD protection exceeding IEC61000-4-2 level 4
■ High flexibility in the design of high density
boards
TM: IPAD is a trademark of STMicroelectronics.
October 2004
COMPLIES WITH THE FOLLOWING ESD
STANDARDS:
IEC 61000-4-2 (R = 330Ω C = 150pF)
Level 4 ±15 kV (air discharge)
±8 kV (contact discharge)
MIL STD 883C, Method 3015-6
Class 3 C = 100pF R = 1500Ω
3 positive strikes and
3 negative strikes (F = 1 Hz)
REV. 2
1/8
KBMF
Table 2: Absolute Maximum Ratings (T
amb
= 25°C)
Symbol Parameter Value Unit
V
PP
T
j
T
stg
T
L
T
op
P
r
ESD discharge R = 330W C = 150pF contact discharge
ESD discharge - MIL STD 883 - Method 3015-6
Junction temperature 150 °C
Storage temperature range - 55 to +150 °C
Lead solder temperature (10 second duration) 260 °C
Operating temperature Range 0 to 70 °C
Power rating per resistor 100 mW
Table 3: Electrical Characteristics (T
amb
= 25°C)
±12
±25
kV
Symbol Parameters Test conditions Min Typ Max Unit
I
R
V
BR
V
F
Diode leakage current
Diode breakdown voltage
Diode forward voltage drop
= 5.0V
V
RM
= 1mA
I
R
= 50mA
I
F
10 µA
6V
0.9 V
TECHNICAL INFORMATION
1. EMI FILTERING
The KBMFxxSC6 ensure a filtering protection against ElectroMagnetic and RadioFrequency Interferences
thanks to its low-pass filter structure. This filter is characterized by the following parameters :
- cut-off frequency
- Insertion loss
- high frequency rejection
Figure 2: Measurements configuration Figure 3: KBMF attenuation curve
Insertion loss (dB)
0
-10
-20
-30
-40
1 10 100 1000
F (MHz)
2/8
TG OUT
50 Ω
Vg
TEST BOARD
KM1
RF IN
50 Ω
KBMF
2. ESD PROTECTION
The KBMFxxSC6 is particularly optimized to perform ESD protection. ESD protection is based on the use
of device which clamps at:
V
= VBR + Rd.I
output
This protection function is splitted in 2 stages. As shown in figure 4, the ESD strikes are clamped by the
first stage S1 and then its remaining overvoltage is applied to the second stage through the resistor R.
Such a configuration makes the output voltage very low at the V
Figure 4: ESD clamping behavior
PP
output
level.
Rg
V
PP
ESD Surge
To have a good approximation of the remaining voltages at both V
V
Rd
BR
S1
Rs
Vinput
Voutput
KBMFxxSC6
S2
Rd
V
input
BR
and V
Rload
Device
to be
protected
stages, we give the
output
typical dynamical resistance value Rd. By taking into account these following hypothesis : R
and R
load>Rd
, it gives these formulas:
V
V
input
output
RgV
=
RsV
=
-----------------------------------------------------------------
BRRdVg
-----------------------------------------------------R
g
BRRdVinput
R
t
⋅+⋅
⋅+⋅
t>Rd
, Rg>R
d
The results of the calculation done for V
R
= 1Ω (typ.) give:
d
V
input
V
output
= 31.2 V
= 7.8 V
=8kV, Rg=330Ω (IEC 61000-4-2 standard), VBR=7V (typ.) and
PP
This confirms the very low remaining voltage across the device to be protected. It is also important to note
that in this approximation the parasitic inductance effect was not taken into account. This could be few
tenths of volts during few ns at the input side. This parasitic effect is not present at the output side due the
low current involved after the resistance R
.
S
The measurements done here after show very clearly (figure 6) the high efficiency of the ESD protection :
- no influence of the parasitic inductances on output stage
- V
clamping voltage very close to VBR (positive strike) and -VF (negative strike)
output
3/8
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