3 A synchronous 900 kHz step-down DC-DC converter
with inhibit function based on the ST1S10
Features
■ Input voltage range: 2.5 V to 18 V
■ Max I
■ High internal switching frequency : 900 kHz
■ PWM mode operation with a fixed frequency or
synchronized to an external frequency
between 400 kHz and 1.2 MHz
■ Inhibit pin available
■ Quiescent current : < 6 µA in inhibit state
Description
The ST1S10 is a step-down DC-DC converter
with inhibit function optimized for powering high
voltages in LCD applications and low voltage,
digital core HDD applications. It replaces the high
current linear solution when high power
dissipation is a problem. It provides up to 3 A over
an input voltage range of 2.5 V to 18 V, and
synchronous rectification removes the need for an
external Schottky diode. A high internal switching
frequency (900 kHz) allows for the use of tiny
surface-mount components, as well as the
resistor divider to set the output voltage value.
Only an inductor and 3 capacitors are required.
The current mode PWM architecture and stable
operation with low-ESR SMD ceramic capacitors
result in low output ripple. To maximize power
conversion efficiency in light load, the regulator
can work in burst mode automatically. The device
can operate in PWM mode with a fixed frequency
or synchronized to an external frequency. It
switches at a frequency of 900 kHz when the
SYNC pin is connected to ground or a fixed
voltage (less than 5.5 V), and can synchronize the
switching frequency between 400 kHz to 1.2 MHz
from external clock that is applied to SYNC pin. A
thermal shutdown circuit is integrated and
activates at 150 °C. Cycle-by-cycle current
limitation provides protection against shorted
outputs.
out
: 3 A
STEVAL-ISA044V2
Data brief
STEVAL-ISA044V2
The quiescent current is less than 6 µA in inhibit
state. The device is available in MLP4x4 and
SO-8 ePad packages.
September 2009 Doc ID 14449 Rev 2 1/4
For further information contact your local STMicroelectronics sales office.
www.st.com
4
Circuit schematic STEVAL-ISA044V2
1 Circuit schematic
Figure 1. Schematic
t
t
Vou
4
CN
Vou
D
GN
D
GN
C2
R1
R2
C
L1
SYN
7
3
3
CN
1
IC
2 5 4-8
2
6
1
CN
132
R3
C1
C3
F
N
2/4 Doc ID 14449 Rev 2
1
CN
n
Vi
n
Vi
D
GN
D
GN
1-2=INH-O
2-3=INH-OF