ST HCF4541B User Manual

HCF4541B
PROGRAMMABLE TIMER
16 STAGE BINARY COUNTER
LOW SYMMETR. OUTPUT RESISTANCE,
TYPICALLY 100 at V
OSCILLATOR FREQUENCY RANGE :
DD
= 15V
DC to 100KHz
OSCILLATOR DURING RESET TO REDUCE POWER DISSIPATION
OPERATES WITH VERY SLOW CLOCK
RISE AND FALL TIMES
BUILT-IN LOW-POWER RC OSCILLATOR
EXTERNAL CLOCK (applied to pin 3) CAN
BE USED INSTEAD OF OSCILLATOR
OPERATES A S 2
n
FREQUENCY DIVIDER
OR AS A SINGLE-TRANSITION TIMER
Q/Q SELECT PROVIDES OUTPUT LOGIC
LEVEL FLEXIBILITY
CAPABLE OF DRIVING SIX LOW POWER
TTL LOADS, THREE LOW POWER SCHOTTKY LOADS, OR SIX HTL LOADS OVER THE RATED TEMP. RANGE
5V, 10V AND 15V PARAMETRIC RATINGS
100% TESTED FOR QUIESCENT CURRENT
AT 20V
MEETS ALL REQUIREMENTS OF JEDEC
JESD13B " STANDARD SPECIFICATIONS FOR DESCRIPTI ON OF B SERI ES CMOS DEVICES"
DIP SOP
ORDER CODES
PACKAGE TUBE T & R
DIP HCF4541BEY
SOP HCF4541BM1 HCF4541M013TR
DESCRIPTION
The HCF4541B is a m onolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. This device is composed of a 16-stages binary counter, an oscillator controlled by 2 external resistors and a capacitor, an o utput control logic and an automatic power-on reset circuit. The counter varies on positive-edge clock transition and it can be cleared by the MASTER RESET input. The output from this timer is the Q or Q output from the 8th, 13th, or 16th counter stage. The choice of the stage depends on the time
PIN CONNECTION
1/10September 2002
HCF4541B
select inputs A or B (see frequency selection table). The output is available in one of the two modes that can be selected via the M ODE input pin 10 (see truth table). The output turns out as a continuos square wave, with a frequenc y equal to the oscillator frequency divided by 2
N
when this MODE input is a logic "1". When it is a logic "0" and after a MASTER RESET is started, and Q output has been selected, the output goes up to a high state after 2
N-1
counts. It remains in that state till another M ASTER RE SET pulse is apply or the mode input is a logic "1". The process starts by setting the AUTO RESET input (pin 5) to logic
"0" and switching power on . If pin 5 is set to logic "1", the AUTO RESET circuit is not enabled and counting cannot start till a positive MASTER RESET pulse is applied, returning to a low level. The AUTO RESET consumes a remarkable amount of po wer and should not be used if low power operation is wanted. The frequenc y of the oscillator depends on the RC network. It can be calculated using the following formula :
f = 1 / 2.3 R
TC CTC
where f is between 1KHz and 100KHz and RS > 10 K and 2 RTC
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No SYMBOL NAME AND FUNCTION
12, 13 A, B Time Select Input
4, 11 NC Not Connected
, C
1, 2
3
5 AR Auto Reset Input 6 MR Master Reset Input
10 MODE Mode Select Input
9 8 Q Output
7
14
R
TC
R
S
Q/Q
SELECT
V
SS
V
DD
External Resistor, Capaci-
TC
tor Connection External Resistor Con-
nection or External Clock Input
Output Selector
Negative Supply Voltage Positive Supply Voltage
RC OSCILLATOR CIRCUIT
2/10
FUNCTIONAL DIAGRAM
FREQUENCY SELECTION TABLE TRUTH TABLE
HCF4541B
A B N. of Stages N
L L 13 8192
L H 10 1024 H L 8 256 H H 16 65536
LOGIC DIAGRAM
Count 2
N
PIN
5 Auto Reset On Auto Reset Disable 6 Master Reset Off Master Reset On
Output Initially Low
9
10 Single Transition Mode Recycle Mode
LH
After Reset (Q)
STATE
Output Initially High
After Reset (Q
)
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