ST HCF4094B User Manual

8 STAGE SHIFT AND STORE BUS REGISTER
3-STATE PARALLELOUTPUTS FOR
CONNECTION TO COMM ON BUS
SEPARATE SERIAL OUTPUTS
SYNCHRONOUS TO BOTH POSITIVE AND NEGATIVE CLOCK EDGES FOR CASCADING
MEDIUM SPEED OPERATION 5MHz at 10V
20V
STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
5V,10V AND 15V PARAMETRIC RATINGS
INPUT LEAKAGE CURRE NT
I
= 100nA (MAX) AT VDD=18VTA= 25°C
I
100% TESTED FOR QUIESCENT CURRENT
DESCRIPTION
The HCF4094B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. The HCF4094B is an 8 stages serial shift register having a st orage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs. The parallel outputs may be connected directly to common bus lines. Data is shifted on positive clock transition. The data in each shift register stage is transferred to the
HCF4094B
WITH 3-STATE OUTPUTS
DIP SOP
ORDER CODES
PACKAGE TUBE T & R
DIP HCF4094BEY
SOP HCF4094BM1 HCF4094M013TR
storage register when the STROBE input is high. Data in the storage register appears at the outputs whenever the OUTPUT-E N ABLE signal is high. Two serial output s are available for casc ading a number of HCF4094B devices. Data is available at the Q edges to allow for high speed operation in cascaded system in which the clock rise time is fast. The sam e serial information, available at the Q’
S
provides a means for cascading HCF4094B devices when the clock rise time is slow.
serial output terminal on p os itive clock
S
terminal on the next negative clock edge,
PIN CONNECTION
1/13March 2004
HCF4094B
IINPUT EQUIVALENT CIRCUIT PIN DESCRIP TION
PIN N° SYMBOL NAME AND FUNCTION
2 DATA Data Input 1 STROBE Strobe Input 3 CLOCK Clock Input
9, 10
4, 5, 6, 7, 14,
13, 12, 11
15
8
16
FUNCTIONAL DIAGRAM
Q
S
Q1 to Q8 OUTPUT
ENABLE
V V
,Q’
SS DD
Serial Outputs
S
Parallel Outputs
Output Enable Input Negative Supply Voltage
Positive Supply Voltage
TRUTH TABLE
CLOCK
OUTPUTS
ENABLE
STROBE DATA
L X X OC OC Q7 No Change
L X X OC OC No Change Q7 H L X No Change No Change Q7 No Change HHLL HHHH H H H No Change No Change No Change Q7
X : Don’tCare OC : Open Circuit * At the positive clock edge information on the 7th shift register stage is transferred to the 8th register stage and the QSoutput.
2/13
PARALLEL OUTPUTS SERIAL OUTPUTS
Q
1
Q
n
-1
Q
n
-1
Q
n
Q*
S
Q7 No Change Q7 No Change
Q’
S
LOGIC DIAGRAM
HCF4094B
TIMING CHART
3/13
HCF4094B
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
V
P
T
T
stg
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied.
All voltagevalues arereferredto V (*) 500mW at65
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Value Unit
V
V
T
Supply Voltage
DD
DC Input Voltage -0.5 to VDD+0.5
I
DC Input Current
I
I
Power Dissipation per Package 500 (*) mW
D
-0.5 to +22 V
± 10 mA
Power Dissipation per Output Transistor 100 mW Operating Temperature
op
Storage Temperature
pin voltage.
°C; derate to 300mW by 10mW/°Cfrom65°Cto85°C
Supply Voltage
DD
Input Voltage 0 to V
I
Operating Temperature
op
SS
-55 to +125 °C
-65 to +150 °C
3to20 V
DD
-55 to 125 °C
V
V
4/13
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