HCF4056B
BCD TO 7 SEGMENT DECODER /DRIVER WITH STROBED LATCH FUNCTION
■QUIESCENT CURRENT SPECIF. UP TO 20V
■OPERATION OF LIQUID CRYSTALS WITH CMOS CIRCUITS PROVIDES ULTRA LOW POWER DISPLAY.
■EQUIVALENT AC OUTPUT DRIVE FOR LIQUID CRYSTAL DISPLAYS - NO EXTERNAL CAPACITOR REQUIRED
■VOLTAGE DOUBLING ACROSS DISPLAY
[(VDD - VEE) = 18V] RESULTS IN EFFECTIVE 36V (p-p) DRIVE ACROSS SELECTED DISPLAY SEGMENTS
■LOW OR HIGH OUTPUT LEVEL DC DRIVE FOR OTHER TYPES OF DISPLAYS
■ONE CHIP LOGIC LEVEL CONVERSION FOR DIFFERENT INPUT AND OUTPUT LEVEL SWINGS
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DIP |
SOP |
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ORDER CODES |
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PACKAGE |
TUBE |
T & R |
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DIP |
HCF4056BEY |
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SOP |
HCF4056BM1 |
HCF4056M013TR |
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■FULL DECODING OF ALL INPUT COMBINATIONS : "0 - 9, L, H, P, A" AND BLANK POSITIONS
■INPUT LEAKAGE CURRENT
II = 100nA (MAX) AT VDD = 18V TA = 25°C
■100% TESTED FOR QUIESCENT CURRENT
■MEETS ALL REQUIREMENTS OF JEDEC JESD13B "STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICES"
DESCRIPTION
HCF4056B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages.
PIN CONNECTION
HCF4056B is a single digit BCD to 7 segment decoder driver circuit that provides a level shifting function on the chip. This feature permits the BCD input-signal swings (VDD to VSS) to be the same as or different from the 7-segment output signal swings (VDD to VEE). For example, the BCD
input-signal swings (VDD to VSS) may be as low as 0 to -3V, whereas the output-display drive signal
swing (VDD to VEE) may be from 0 to -5V. If VDD to VEE exceeds 15V, VDD to VSS should be at least
4V. The 7-segment outputs are controlled by the DISPLAY-FREQUENCY (DF) input, which causes the selected segment outputs to be low, high, or a square wave output (for liquid crystal displays).
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HCF4056B
When the DF input is low, the output segments will be high when selected by the BCD inputs. When the DF input is high, the output segments will be low when selected by the BCD inputs. When a square wave is present at the DF input, the selected segments will have a square wave output that is 180° out of phase with the DF input. Those segments which are not selected will have a square wave output that is in phase with the input. DF square wave repetition rates for liquid crystal displays usually range from 30Hz (well above flicker rate) to 200Hz (well below the upper limit of the liquid crystal frequency response). HCF4056B provides a strobed-latch function at the BCD inputs. The decoding of all input combinations in
INPUT EQUIVALENT CIRCUIT
FUNCTIONAL DIAGRAM
this device provides displays of 0 to 9 as well as L, P, H, A, -, and a blank position. The level shifted function permits the use of different input and output signal swings. The input swings from a low
level of VSS to a high level of VDD, while the outputs swing from a low level of VEE to the same
high level of VDD. Thus, the input and output swings can be selected independently of each other over a 3 to 18V range. VSS may be connected to VEE when no level-shift function is required. The HCF4056B, however must be used together with HCF4054B to provide the common DF output.
PIN DESCRIPTION
PIN No |
SYMBOL |
NAME AND FUNCTION |
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5, 3, 2, 4 |
20, 21, 22, 23 |
BCD Inputs |
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9, 10, 11, 12, |
a to g |
7 - Segments Outputs |
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13, 15, 14 |
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6 |
DISPLAY |
Display Frequency Input |
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FREQ. IN |
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1 |
STROBE |
Strobe Input |
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7 |
VEE |
Negative Supply Voltage |
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8 |
VSS |
Negative Supply Voltage |
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16 |
VDD |
Positive Supply Voltage |
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HCF4056B
TRUTH TABLE
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INPUT CODE |
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OUTPUT STATE |
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DISPLAY |
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23 |
22 |
21 |
20 |
a |
b |
c |
d |
e |
f |
g |
CHARACTER |
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L |
L |
L |
L |
H |
H |
H |
H |
H |
H |
L |
0 |
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L |
L |
L |
H |
L |
H |
H |
L |
L |
L |
L |
1 |
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L |
L |
H |
L |
H |
H |
L |
H |
H |
L |
H |
2 |
L |
L |
H |
H |
H |
H |
H |
H |
L |
L |
H |
3 |
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L |
H |
L |
L |
L |
H |
H |
L |
L |
H |
H |
4 |
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L |
H |
L |
H |
H |
L |
H |
H |
L |
H |
H |
5 |
L |
H |
H |
L |
H |
L |
H |
H |
H |
H |
H |
6 |
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L |
H |
H |
H |
H |
H |
H |
L |
L |
L |
L |
7 |
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H |
L |
L |
L |
H |
H |
H |
H |
H |
H |
H |
8 |
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H |
L |
L |
H |
H |
H |
H |
H |
L |
H |
H |
9 |
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H |
L |
H |
L |
L |
L |
L |
H |
H |
H |
L |
L |
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H |
L |
H |
H |
L |
H |
H |
L |
H |
H |
H |
H |
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H |
H |
L |
L |
H |
H |
L |
L |
H |
H |
H |
P |
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H |
H |
L |
H |
H |
H |
H |
L |
H |
H |
H |
A |
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H |
H |
H |
L |
L |
L |
L |
L |
L |
L |
H |
- |
H |
H |
H |
H |
L |
L |
L |
L |
L |
L |
L |
BLANK |
ABSOLUTE MAXIMUM RATINGS
Symbol |
Parameter |
Value |
Unit |
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VDD |
Supply Voltage |
-0.5 to +22 |
V |
VI |
DC Input Voltage |
-0.5 to VDD + 0.5 |
V |
II |
DC Input Current |
± 10 |
mA |
PD |
Power Dissipation per Package |
200 |
mW |
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Power Dissipation per Output Transistor |
100 |
mW |
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Top |
Operating Temperature |
-55 to +125 |
°C |
Tstg |
Storage Temperature |
-65 to +150 |
°C |
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied.
All voltage values are referred to VSS pin voltage.
RECOMMENDED OPERATING CONDITIONS
Symbol |
Parameter |
Value |
Unit |
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VDD |
Supply Voltage |
3 to 20 |
V |
VI |
Input Voltage |
0 to VDD |
V |
Top |
Operating Temperature |
-55 to 125 |
°C |
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