ST EVAL6472H User Manual

Fully integrated stepper motor driver based on the L6472
EVAL6472H
Features
Voltage range from 8 V to 45 V
SPI with daisy chain feature
SW input
FLAG and BUSY LED indicators
Adjustable supply voltage compensation
Suitable for use in combination with STEVAL-
PCC009V2
Description
r.m.s.
EVAL6472H
Data brief
The EVAL6472H demonstration board is a fully integrated microstepping motor driver. In combination with the STEVAL-PCC009V2 communication board and the dSPIN evaluation software, the board allows the user to investigate all the features of the L6472 device. In particular, the board can be used to regulate the L6472 parameters in order to fit application requirements.
The EVAL6472H supports the daisy chain configuration making it suitable for the evaluation of the L6472 in the multi-motor applications.
March 2012 Doc ID 022980 Rev 1 1/11
For further information contact your local STMicroelectronics sales office.
www.st.com
11
Board description EVAL6472H
Phase A connector
Power supply connector
(8 V - 45 V )
Master SPI connector
BUSY LED
(Amber)
FLAG LED
(Red)
Motor supply voltage
compensation
partitioning regulation
(ADCIN input)
External switch connector
(SW input)
JP1: VDD supply from master SPI connector
JP2: VDD to VREG connection
OSCIN/OSCOUT connector
JP3: Daisy chain termination
Phase B connector
Slave SPI connector
Application reference
area
AM10289V1

1 Board description

Table 1. EVAL6472H specifications

Parameter Value
Supply voltage (VS) 8 to 45 V
Maximum output current (each phase) 3 A
Logic supply voltage (VREG)
Externally supplied: 3.3 V
Internally supplied: 3 V typical
r.m.s.
Logic interface voltage (VDD)
Externally supplied: 3.3 V or 5 V
Internally supplied: VREG
Low level logic input voltage 0 V
High level logic input voltage VDD
Operating temperature -25 to +125 °C
L6472H thermal resistance junction-to-ambient 21 °C/W typical
1. All logic inputs are 5 V tolerant.

Figure 1. Jumpers and connectors location

(1)
2/11 Doc ID 022980 Rev 1
EVAL6472H Board description

Table 2. Jumpers and connectors description

Name Type Function
M1 Power supply Motor supply voltage
M2 Power output Bridge A outputs
M3 Power output Bridge B outputs
CN1 SPI connector Master SPI
CN2 SPI connector Slave SPI
CN3 NM connector OSCIN and OSCOUT pins
CN4 NM connector External switch input
TP1 (VS) Test point Motor supply voltage test point
TP2 (VDD) Test point Logic interface supply voltage test point
TP3 (VREG) Test point
TP5 (GND) Test point Ground test point
TP6 (GND) Test point Ground test point
Logic supply voltage/L6470 internal regulator test point
TP8 (STCK) Test point Step clock input test point
TP9 (STBY/RES) Test point Standby/reset input test point
TP10 (FLAG) Test point FLAG output test point
TP11
(BUSY/SYNC)
Test point BUSY/SYNC output test point

Table 3. Master SPI connector pinout (J10)

Pin
number
1 Open drain output L6472 BUSY output
2 Open drain output L6472 FLAG output
3 Ground Ground
4 Supply EXT_VDD (can be used as external logic power supply)
5 Digital output
6 Digital input SPI serial clock signal (connected to L6472 CK input)
7 Digital input
8 Digital input SPI slave select signal (connected to L6472 CS input)
Type Description
SPI master IN slave OUT signal (connected to L6472 SDO output through daisy chain termination jumper JP2)
SPI master OUT slave IN signal (connected to L6472 SDI input)
9 Digital input L6472 step-clock input
10 Digital input L6472 standby/reset input
Doc ID 022980 Rev 1 3/11
Board description EVAL6472H

Table 4. Slave SPI connector pinout (J11)

Pin
number
1 Open drain output L6472 BUSY output
2 Open drain output L6472 FLAG output
3 Ground Ground
4 Supply EXT_VDD (can be used as external logic power supply)
5 Digital output SPI master IN slave OUT signal (connected to pin 5 of J10)
6 Digital input SPI serial clock signal (connected to L6472 CK input)
7 Digital input
8 Digital input SPI slave select signal (connected to L6472 CS input)
9 Digital input L6472 step-clock input
10 Digital input L6472 standby/reset input
Type Description
SPI master OUT slave IN signal (connected to L6472 SDO output)
4/11 Doc ID 022980 Rev 1
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