EMIF10-LCD02F3
10-line IPAD™, EMI filter and ESD protection for LCD and cameras
Features
■ Lead-free package
■ EMI symmetrical (I/O) low-pass filter
■ High efficiency in EMI filtering
■ 400 µm pitch
■ Compatible with high speed data rate
■ Very low PCB space occupation: < 4 mm
Very thin package: 0.60 mm
■
■ High efficiency in ESD suppression
■ High reliability offered by monolithic integration
■ High reduction of parasitic elements through
2
integration and wafer level packaging
Complies with the following standards
■ IEC 61000-4-2 level 4 on inputs and outputs
– 15 kV (air discharge)
– 8 kV (contact discharge)
■ MIL STD 883G - Method 3015-6 Class 3
Applications
Figure 1. Pin layout (bump side)
Lead-free Flip-Chip package
(24 bumps)
4
O2
O4
O6
O8
O10
3
GND
GND
GND
GND
12
I1
I2
I4
I3
I6
I5
I7
I8
I9
I10
5
O1
O3
O5
O7
O9
A
B
C
D
E
Where EMI filtering in ESD sensitive equipment is
required:
■ LCD for mobile phones
■ Computers and printers
■ Communication systems
■ MCU boards
Description
Figure 2. Device configuration
Low-pass Filter
Input
GND GND GND
Output
Ri/o = 70
Ω
Cline = 30pF
The EMIF10-LCD02F3 is a 10-line highly
integrated device designed to suppress EMI/RFI
noise in all systems subjected to electromagnetic
interference. The EMIF10 Flip-Chip packaging
means the package size is equal to the die size.
This filter includes ESD protection circuitry, which
prevents damage to the protected device when
subjected to ESD surges up 15 kV.
November 2009 Doc ID 11507 Rev 3 1/8
TM: IPAD is a trademark of STMicroelectronics.
www.st.com
8
Characteristics EMIF10-LCD02F3
1 Characteristics
Table 1. Absolute maximum ratings (T
Symbol Parameter and test conditions Value Unit
Maximum junction temperature 125 °C
T
j
T
Operating temperature range -40 to +85 °C
op
amb
= 25 °C)
T
Storage temperature range -55 to 150 °C
stg
Figure 3. Electrical characteristics (definitions)
Symbol Parameter
V = Breakdown voltage
BR
V = Clamping voltage
CL
I = Leakage current @ V
RM RM
V = Stand-off voltage
RM
I = Peak pulse current
PP
I = Breakdown current
R
I = Forward current
PP
R = Series resistanc between input and output
I/O
C = Input capacitance per line
line
Table 2. Electrical characteristics (T
amb
= 25 °C)
V
CL
V
V
BR
Symbol Test conditions Min. Typ. Max. Unit
V
BRIR
I
RM
R
C
line
= 1 mA 6 8 10 V
VRM = 3 V 50 200 nA
Tolerance ± 20% 70 Ω
2
Vline = 0 V, V
= 30 mV, F =1 MHz 30 pF
OSC
I
PP
I
I
R
I
RM
RM
I
RM
I
R
I
PP
V
CL
VBRV
RM
V
2/8 Doc ID 11507 Rev 3
EMIF10-LCD02F3 Characteristics
Figure 4. S21 all lines attenuation
measurement
Figure 6. ESD response to IEC 61000-4-2
(+15 kV air discharge) on one input
and on one output
Input
10V/d
Figure 5. Analog cross talk measurement
0.00
0.00
0.00
dB
dB
dB
-10.00
-10.00
-10.00
-20.00
-20.00
-20.00
-30.00
-30.00
-30.00
-40.00
-40.00
-40.00
-50.00
-50.00
-50.00
-60.00
-60.00
-60.00
-70.00
-70.00
-70.00
-80.00
-80.00
-80.00
-90.00
-90.00
-90.00
-100.00
-100.00
-100.00
100.0k 1.0M 10.0M 100.0M 1.0G
100.0k 1.0M 10.0M 100.0M 1.0G
100.0k 1.0M 10.0M 100.0M 1.0G
f/Hz
f/Hz
f/Hz
Xtalk 1/2
Xtalk 1/2
Xtalk 1/2
Figure 7. ESD response to IEC 61000-4-2
(-15 kV air discharge) on one input
and on one output
Input
10V/d
Output
10V/d
100ns/d
Figure 8. Line capacitance versus applied voltage
C (pF)
line
30
25
20
15
10
5
0
0123456
V (V)
line
Output
10V/d
100ns/d
Doc ID 11507 Rev 3 3/8
Ordering information scheme EMIF10-LCD02F3
2 Ordering information scheme
Figure 9. Ordering information scheme
EMIF yy - xxx zz F3
EMI Filter
Number of lines
Information
x = resistance value (Ohms)
z = capacitance value / 10 (pF)
or
3 letters = application
2 digits = version
Package
F = Flip Chip
3 = Lead-free, pitch = 400 µm, bump = 255 µm
4/8 Doc ID 11507 Rev 3
EMIF10-LCD02F3 Package information
3 Package information
● Epoxy meets UL94, V0
● Lead-free packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK®
®
is an ST trademark.
.
Figure 10. Package dimensions
400 µm typ
170 µm typ
400 µm typ
1.94 mm ± 30µm
170 µm typ
255µm± 40
1.94 mm ± 30µm
605µm ± 55
Figure 11. Footprint Figure 12. Marking
Copper pad Diameter:
220 µm recommended
260 µm maximum
Solder mask opening:
300 µm minimum
Solder stencil opening:
220 µm recommended
Dot, ST logo
xx = marking
z = manufacturing location
yww = datecode
(y = year
ww = week)
E
xyxwz
w
Doc ID 11507 Rev 3 5/8
Package information EMIF10-LCD02F3
Figure 13. Flip-Chip tape and reel specification
Dot identifying Pin A1 location
4 ± 0.1
Ø 1.5 ± 0.1
1.75 ± 0.1 3.5 ± 0.1
8 ± 0.3
ST
yww
xxz
E
0.69 ± 0.05
All dimensions in mm
User direction of unreeling
Note: More information is available in the application notes:
AN2348: “STMicroelectronics 400 micro-metre Flip-Chip: Package description and
recommendation for use”
AN1751: "EMI Filters: Recommendations and measurements"
2.11
yww
xxz
2.11
ST
E
ST
yww
xxz
E
4 ± 0.1
6/8 Doc ID 11507 Rev 3
EMIF10-LCD02F3 Ordering information
4 Ordering information
Table 3. Ordering information
Order code Marking Package Weight Base qty Delivery mode
EMIF10-LCD02F3 GY Flip-Chip 5.0 mg 5000 Tape and reel 7”
5 Revision history
Table 4. Document revision history
Date Revision Changes
11-Jul-2005 1 First issue.
28-Apr-2008 2
18-Nov-2009 3
Updated ECOPACK statement. Updated Figure 9, Figure 10, Figure 11
and Figure 13. Reformatted to current standards.
Updated Figure 10 for die dimension reduction. Updated Figure 13 for
scaling.
Doc ID 11507 Rev 3 7/8
EMIF10-LCD02F3
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8/8 Doc ID 11507 Rev 3
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