ST EMIF10-COM01C2 User Manual

IPAD™

Main product characteristics

EMI filtering and ESD protection for:

■ Computers and printers

■ Communication systems

■ Mobile phones

EMIF10-COM01C2

EMI Filter including ESD protection

Description

The EMIF10-COM01C2 is a highly integrated
device designed to suppress EMI / RFI noise in all
systems subjected to electromagnetic
interferences. The EMIF10 Flip-Chip packaging
means the package size is equal to the die size.

Additionally, this filter includes an ESD protection
circuitry which prevents damage to the application
when subjected to ESD surges up to 15 kV.

Benefits

■ EMI symmetrical (I/O) low-pass filter

■ Coating resin on flat side

■ Very low PCB space consuming: < 6 mm

■

Very thin package: 0.65 mm

■ High efficiency in ESD suppression on both

input and output pins

■ High reliability offered by monolithic integration

■ Lead free package

Complies with the following standards:

2

Lead free coated Flip-Chip

(25 Bumps)

Order code

Part Number Marking

EMIF10-COM01C2 FE

Figure 1. Pin configuration (Bump side)

54

I5

Figure 2. Basic cell configuration

3

21

I3

I9 I8I10

GNDGND

I1

I2I4

I6

I7

GNDGND GND

0609 08010 07

0204 0305

01

A

B

C

D

E

IEC 61000-4-2 level 4

15 kV (air discharge)

Input

Low-pass Filter

Output

8 kV (contact discharge)

R = 200

I/O

C = 45 pF

TM: IPAD is a trademark of STMicroelctronics

line

April 2006 Rev4 1/7

Ω

www.st.com

7

Characteristics EMIF10-COM01C2

1 Characteristics

Table 1. Absolute Ratings (T

Symbol Parameter and test conditions Value Unit

= 25 °C)

amb

V

T

T

Table 2. Electrical Characteristics (T

ESD discharge IEC61000-4-2, air discharge

PP

ESD discharge IEC61000-4-2, contact discharge

Junction temperature 125 °C

T

j

Operating temperature range - 40 to + 85 °C

op

Storage temperature range - 55 to + 150 °C

stg

Symbol Parameter

V

V

V

R

C

Breakdown voltage

BR

I

Leakage current @ V

RM

Stand-off voltage

RM

Clamping voltage

CL

R

Dynamic impedance

d

I

Peak pulse current

PP

Resistance between Input and Output

I/O

Input capacitance per line

line

RM

= 25 °C)

amb

V

V

CL

slope : 1 / R d

V

RM

BR

15

8

I

I

RM

I

R

I

PP

Symbol Test conditions Min. Typ. Max. Unit

kV

V

V

I

R

R

C

t

IR = 1 mA 6 8 10 V

BR

VRM = 3 V per line 500 nA

RM

IPP = 10 A, tp = 2.5 µs 1 Ω

d

I/O

At 0 V bias 45 50 pF

line

V

LH

= 2.8 V R

input

= 100 kΩ 25 ns

load

2/7

180 200 220 Ω

EMIF10-COM01C2 Characteristics

Figure 3. S21(db) attenuation

measurement

0.00

0.00

0.00

dB

dB

dB

-10.00

-10.00

-10.00

-20.00

-20.00

-20.00

-30.00

-30.00

-30.00

-40.00

-40.00

-40.00

-50.00

-50.00

-50.00

100.0k 1.0M 10.0M 100.0M 1.0G

100.0k 1.0M 10.0M 100.0M 1.0G

100.0k 1.0M 10.0M 100.0M 1.0G

1. Spikes at high frequencies are induced by the PCB layout

(1)

f/Hz

f/Hz

f/Hz

Figure 5. ESD response to IEC 61000-4-2

(+15 kV air discharge) on one input
(V

) and on one output (V

in

V(in1)

out

)

Figure 4. Analog crosstalk

0.00

0.00

dB

dB

-10.00

-10.00

-20.00

-20.00

-30.00

-30.00

-40.00

-40.00

-50.00

-50.00

-60.00

-60.00

-70.00

-70.00

-80.00

-80.00

-90.00

-90.00

-100.00

-100.00

100.0k 1.0M 10.0M 100.0M 1.0G

100.0k 1.0M 10.0M 100.0M 1.0G

Xtalk 1/2 448

Xtalk 1/2 448

f/Hz

f/Hz

Xtalk 1/2 342

Xtalk 1/2 342

Figure 6. ESD response to IEC 61000-4-2

(-15 kV air discharge) on one input
(Vin) and on one output (V

out

V(in1)

)

Figure 7. Rise time measurement

Square signal
Generator Vc = 2.8V

Vin

V(out1)

EMIF10-COM01C2

In Out

100k

V(out1)

Vout

Vout

Vin

3/7