ST EMIF10-1K010F2 User Manual

10-line IPAD™, EMI filter including ESD protection

Features
EMI symmetrical (I/O) low-pass filter
High efficiency in EMI filtering
Lead free package
2.42 mm x 2.42 mm
Very thin package: 0.650 mm
High efficiency in ESD suppression on both
input and output pins (IEC 61000-4-2 level 4)
High reliability offered by monolithic integration
High reducing of parasitic elements through
integration & wafer level packaging
Complies with the following standards:
IEC 61000-4-2 level 4
– 15 kV (air discharge) – 8 kV (contact discharge)
MIL STD 883F - Method 3015.7 Class 3
Applications
Where EMI filtering in ESD sensitive equipment is required:
Mobile Phones
Computers and printers
Communication systems
MCU Boards
Description

EMIF10-1K010F2

Flip Chip
(24 bumps)

Figure 1. Pin configuration (bump side)

5
I7
I9
I10 I8 I6
09 07 05 03 01
010 08 06 04 02

Figure 2. Basic cell configuration

Input
3
4
GND GND
GND GND
Low pass filter
I3
I5
I4 I2
12
A
I1
B
C
D
E
Output
The EMIF10-1K010F2 is a highly integrated device designed to suppress EMI / RFI noise in all systems subjected to electromagnetic
R = 1 k
C = 100 pF
line
Ω
I/O
interferences. The EMIF10 Flip-Chip packaging means the package size is equal to the die size.
Additionally, this filter includes an ESD protection circuitry which prevents damage to the application when subjected to ESD surges up to 15 kV.
TM: IPAD is a trademark of STMicroelectronics.
April 2008 Rev 4 1/8
www.st.com
8
Characteristics EMIF10-1K010F2

1 Characteristics

Table 1. Absolute ratings (T
Symbol Parameter and test conditions Value Unit
ESD discharge IEC 61000-4-2
V
T
T
Table 2. Electrical characteristics (T
Symbol Parameter
V
BR
I
RM
V
RM
V
CL
R
I
PP
R
I/O
C
line
– Air discharge
PP
– Contact discharge
MIL STD 883F - Method 3015.7 Class 3
Junction temperature 125 °C
T
j
Operating temperature range - 40 to + 85 °C
op
Storage temperature range - 55 to + 150 °C
stg
Breakdown voltage
Leakage current @ V
RM
Stand-off voltage
Clamping voltage
Dynamic impedance
d
Peak pulse current
Resistance between Input and Output
Input capacitance per line
= 25 °C)
amb
= 25 °C)
amb
15
8
kV
25
I
I
F
V
BR
V
V
RM
CL
V
F
I
RM
I
R
I
PP
V
Symbol Test conditions Min. Typ. Max. Unit
V
BRIR
I
RM
R
R
I/O
C
line
= 1 mA 6 8 10 V
VRM = 3 V per line 200 nA
IPP = 10 A, tp = 2.5 µs 1 Ω
d
F = 1 MHz V
= 30 mV V
OSC
= 0 V 80 100 120 pF
line
2/8
900 1000 1100 Ω
EMIF10-1K010F2 Characteristics
Figure 3. S21(db) attenuation measurement Figure 4. Analog cross talk measurements
0.00
dB
- 10.00
- 20.00
- 30.00
- 40.00
- 50.00
Figure 5. ESD response to IEC 61000-4-2
1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G f/Hz
(+15 kV air discharge) on one input
) and on one output (V
(V
in
out
INPUT
)
Figure 6. ESD response to IEC 61000-4-2
(-15 kV air discharge) on one input (Vin) and on one output (V
out
INPUT
)
OUTPUT

Figure 7. Capacitance versus reverse applied voltage

C (pF)
120
100
80
60
40
20
0
0.0 1.0 2.0 3.0 4.0 5.0
V(V)
R
OUTPUT
Input / GND
3/8
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