ST EMIF09-SD01F3 User Manual

9-line IPAD™, EMI filter and ESD protection

Features

■ 9-line EMI low-pass filter and ESD protection

■ High efficiency in EMI filtering

■ Lead-free package

■ 400 µm pitch

■ Very low PCB space occupation: < 4 mm

Very thin package: 0.6 mm

■

■ High reliability offered by monolithic integration

■ Reduction of parasitic elements thanks to CSP

integration

Complies with the following standards

■ IEC61000-4-2 level 4 on external pins:

– 15 kV (air discharge)
– 8 kV (contact discharge)

■ IEC61000-4-2 level 2 on internal pins:

– 2 kV (air discharge)
– 2 kV (contact discharge)

■ MIL STD 883F - Method 3015.7 Class 3

2

EMIF09-SD01F3

Flip Chip

24 bumps

Figure 1. Pin layout (bump side)

5

3

4

12

A

B

C

D

E

Application

■ Secure digital memory card in mobile phones

and communication systems

Description

The EMIF09-SD01F3 is a highly integrated array
designed to suppress EMI/RFI noise for secure
digital memory cards. The EMIF09-SD01F3 is in
a Flip Chip package to offer space saving and
high RF performance.

This low-pass filter includes ESD protection
circuitry, which prevents damage to the protected
device when subjected to ESD surges up 15 kV.
This filter also has a low line capacitance to be
compatible with high data rate signals.

TM: IPAD is a trademark of STMicroelectronics.

April 2008 Rev 4 1/9

www.st.com

Characteristics EMIF09-SD01F3

1 Characteristics

Figure 2. Device configuration

VSD

DAT3_PU

DAT3_PU

CLK

CLK

CMD

CMD

DATA0

DATA0

DATA1

DATA1

DATA2

DATA2

DATA3

DATA3

CD

CD

WP

WP

WP+CD

WP+CD

DAT3_PD

DAT3_PD

R21

R21

R11

R11

R13

R13

R15

R15

R12

R12

R14

R14

R1

R1

R2

R2

R3

R3

R4

R4

R5

R5

R6

R6

R7

R7

R8

R8

R9

R9

VSD

SDCLK

SDCLK

SDCMD

SDCMD

SDDATA0

SDDATA0

SDDATA1

SDDATA1

SDDATA2

SDDATA2

SDDATA3

SDDATA3

SDCD

SDCD

SDWP

SDWP

SDWP+CD

SDWP+CD

GND_H

Table 1. Pin-signal attribution

GND_H

GND_C

GND_C

Pin Description Pin Description Pin Description Pin Description Pin Description

A1 DATA2 B1 CD C1 DAT3_PD D1 WP+CD E1 DATA1

A2 DATA3 B2 CMD C2 WP D2 CLK E2 DATA0

A3 GND_H B3 C3 DAT3_PU D3 GND_C E3 GND_C

A4 SDDATA2 B4 SDCD C4 SDWP D4 SDWP+CD E4 SDDATA1

A5 SDDATA3 B5 SDCMD C5 VSD D5 SDCLK E5 SDDATA0

Table 2. Absolute ratings (limiting values)

Symbol Parameter Value Unit

Internal pins (A1, B1, C1, D1, E1, A2, B2, C2, D2, E2, C3)

ESD discharge IEC 61000-4-2, air discharge

V

PP

ESD discharge IEC 61000-4-2, contact discharge

External pins (A4, B4, C4, D4, E4, A5, B5, C5, D5, E5)

ESD discharge IEC 61000-4-2, air discharge
ESD discharge IEC 61000-4-2, contact discharge

T

T

op

T

stg

Junction temperature 125 °C

j

Operating temperature range -30 to + 85 °C

Storage temperature range -55 to 150 °C

15

2
2

kV

8

GND bumps (GND_H and GND_C - A3, D3 and E3) must be connected to ground on the
printed circuit board for ESD testing and RF measurements.

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EMIF09-SD01F3 Characteristics

Table 3. Electrical characteristics (T

Symbol Parameters

V

BR

I

RM

V

RM

V

R

I

PP

R

C

line

Symbol Test conditions Min Typ Max Unit

Breakdown voltage

Leakage current @ V

Stand-off voltage

Clamping voltage

CL

Dynamic impedance

d

Peak pulse current

Series resistance between input

I/O

and output

Input capacitance per line

RM

amb

= 25 °C)

VCLVBRV

VCLVBRV

I

I

I

I

PP

PP

I

I

R

R

I

I

RM

RM

RM

RM

I

I

VRMVBRV

VRMVBRV

RM

RM

I

I

R

R

I

I

PP

PP

V

V

CL

CL

V

I

BR

RM

IR = 1 mA 6 20 V

VRM = 5 V per line 50 200 nA

R1, R2,
R3, R4,
R5, R6,

Tolerance ± 20% 40 Ω

R7, R8, R9

R11, R12,

R13, R14

Tolerance ± 30% 50 kΩ

R15 Tolerance ± 30% 15 kΩ

R21 Tolerance ± 30% 470 kΩ

V

= 0 V, V

C

line

line

(under zero light conditions)

= 30 mV, F = 1 MHz

OSC

20 pF

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