ST EMIF09-SD01F3 User Manual
EMIF09-SD01F3
9-line IPAD™, EMI filter and ESD protection
Features
■9-line EMI low-pass filter and ESD protection
■High efficiency in EMI filtering
■Lead-free package
■400 µm pitch
■Very low PCB space occupation: < 4 mm2
■Very thin package: 0.6 mm
■High reliability offered by monolithic integration
■Reduction of parasitic elements thanks to CSP integration
Complies with the following standards
■IEC61000-4-2 level 4 on external pins:
–15 kV (air discharge)
–8 kV (contact discharge)
■IEC61000-4-2 level 2 on internal pins:
–2 kV (air discharge)
–2 kV (contact discharge)
■MIL STD 883F - Method 3015.7 Class 3
Flip Chip 24 bumps
Figure 1. Pin layout (bump side)
5 4 3 2 1
A
B
C
D
E
Application
■Secure digital memory card in mobile phones and communication systems
Description
The EMIF09-SD01F3 is a highly integrated array designed to suppress EMI/RFI noise for secure digital memory cards. The EMIF09-SD01F3 is in a Flip Chip package to offer space saving and high RF performance.
This low-pass filter includes ESD protection circuitry, which prevents damage to the protected device when subjected to ESD surges up 15 kV. This filter also has a low line capacitance to be compatible with high data rate signals.
April 2008
TM: IPAD is a trademark of STMicroelectronics.
Rev 4 |
1/9 |
www.st.com
Characteristics |
EMIF09-SD01F3 |
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1 Characteristics
Figure 2. Device configuration
VSD
DAT3_PU
R11 |
R13 |
R15 |
R12 |
R14 |
CLK |
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CMD |
R2 |
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DATA0 |
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DATA1 |
R4 |
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DATA2 |
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DATA3 |
R6 |
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CD |
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WP |
R8 |
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WP+CD |
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DAT3_PD |
R21 |
R1 |
SDCLK |
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SDCMD |
R3 |
SDDATA0 |
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SDDATA1 |
R5 |
SDDATA2 |
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SDDATA3 |
R7 |
SDCD |
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SDWP |
R9 |
SDWP+CD |
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GND_H GND_C
Table 1. |
Pin-signal attribution |
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Pin |
Description |
Pin |
Description |
Pin |
Description |
Pin |
Description |
Pin |
Description |
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A1 |
DATA2 |
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B1 |
CD |
C1 |
DAT3_PD |
D1 |
WP+CD |
E1 |
DATA1 |
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A2 |
DATA3 |
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B2 |
CMD |
C2 |
WP |
D2 |
CLK |
E2 |
DATA0 |
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A3 |
GND_H |
B3 |
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C3 |
DAT3_PU |
D3 |
GND_C |
E3 |
GND_C |
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A4 |
SDDATA2 |
B4 |
SDCD |
C4 |
SDWP |
D4 |
SDWP+CD |
E4 |
SDDATA1 |
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A5 |
SDDATA3 |
B5 |
SDCMD |
C5 |
VSD |
D5 |
SDCLK |
E5 |
SDDATA0 |
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Table 2. |
Absolute ratings (limiting values) |
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Symbol |
Parameter |
Value |
Unit |
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Internal pins (A1, B1, C1, D1, E1, A2, B2, C2, D2, E2, C3) |
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ESD discharge IEC 61000-4-2, air discharge |
2 |
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VPP |
ESD discharge IEC 61000-4-2, contact discharge |
2 |
kV |
External pins (A4, B4, C4, D4, E4, A5, B5, C5, D5, E5) |
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ESD discharge IEC 61000-4-2, air discharge |
15 |
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ESD discharge IEC 61000-4-2, contact discharge |
8 |
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Tj |
Junction temperature |
125 |
°C |
Top |
Operating temperature range |
-30 to + 85 |
°C |
Tstg |
Storage temperature range |
-55 to 150 |
°C |
GND bumps (GND_H and GND_C - A3, D3 and E3) must be connected to ground on the printed circuit board for ESD testing and RF measurements.
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EMIF09-SD01F3 |
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Characteristics |
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Table 3. |
Electrical characteristics (Tamb = 25 °C) |
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Symbol |
Parameters |
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VBR |
Breakdown voltage |
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I |
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IRM |
Leakage current @ VRM |
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IPP |
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VRM |
Stand-off voltage |
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VCL |
Clamping voltage |
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VCLVBR VRM |
IR |
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V |
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I |
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RM |
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R |
Dynamic impedance |
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IRM |
V V |
BR |
V |
CL |
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d |
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IR |
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RM |
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IPP |
Peak pulse current |
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RI/O |
Series resistance between input |
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IPP |
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and output |
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Cline |
Input capacitance per line |
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Symbol |
Test conditions |
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Min |
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Typ |
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Max |
Unit |
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VBR |
IR = 1 mA |
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6 |
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20 |
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V |
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IRM |
VRM = 5 V per line |
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50 |
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200 |
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nA |
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R1, R2, |
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R3, R4, |
Tolerance ± 20% |
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40 |
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Ω |
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R5, R6, |
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R7, R8, R9 |
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R11, R12, |
Tolerance ± 30% |
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50 |
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kΩ |
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R13, R14 |
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R15 |
Tolerance ± 30% |
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15 |
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kΩ |
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R21 |
Tolerance ± 30% |
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470 |
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kΩ |
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Cline |
Vline = 0 V, VOSC = 30 mV, F = 1 MHz |
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20 |
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pF |
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(under zero light conditions) |
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