Datasheet EMIF08-VID01F2 Datasheet (ST)

EMIF08-VID01F2

8 line low capacitance EMI filter
and ESD protection
Main product characteristics
Where EMI filtering in ESD sensitive equipment is required :
LCD & camera for mobile phones
Computers and printers
Communication systems
MCU Boards
Description
The EMIF08-VID01F2 is an 8 line highly integrated device designed to suppress EMI/RFI noise in all syste ms subjected to electromag netic interference. The flip chip packaging means the package size is equal to the die size.
This filter include s ESD pr otection ci rcuitr y, which prevents damage to the application when it is subjected to ESD surges up to 15kV.
Benefits
High efficiency EMI filter (-33 dB @ 900 Mhz)
Low line capacitance suitable for high speed
data bus
Low serial resistance for camera impedance
adaptation
Optimized PCB space consuming: 1.29 mm x
3.92 mm
Very thin package: 0.65 mm
Lead free pacakge
High efficiency in ESD suppression on inputs
pins (IEC61000-4-2 level 4).
High reliability offered by monolithic integration
High reducing of parasitic elements through
integration & wafer level packaging.
Lead free flip chip package
Pin configuration (Bumps side)
9 8 7
6 5 4 3 2 112 11 10
I8O8I7O7I6O6I5O5I4O4I3O3I2O2I1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Complies with following standards:
IEC61000-4-2
level 4 input pins 15 kV (air discharge)
8 kV (contact discharge
level 1 output pins 2 kV (air discharge)
2 kV (contact discharge
MIL STD 883E - Method 3015-6 Class 3
O1
A B C
Rev 2
August 2005 1/6
www.st.com
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1 Electrical characteristics (T

Figure 1. Basic cell configuration

= 25°C) EMIF08-VID01F2
amb
Input
Output
RRRRRRR
R = 100
C
= 16 pF typ. @ 3V
line

Table 1. Absolute ratings (limiting values)

Symbol Parameter Value Unit
Vpp
ESD discharge IEC61000-4-2 air discharge ESD discharge IEC61000-4-2 contac t dis charge
Tj Maximum junction temperature 125 °C
T
op
T
stg
Operating t emperature range -40 to +85 °C Storage temperature range -55 to +150 °C
15
8
kV
KV
1 Electrical characteristics (T
Symbol Parameters
V
BR
Breakdown voltage
I
V
C
Leakage current @ V
RM
RM
Stand-off voltage
Series resistance between Input &
R
Output
line
Input capacitance per line
RM
Symbol Test conditions Min Typ Max Unit
V
BR
I
RM
R
I/O
C
line
IR = 1mA VRM = 3V per line I=10mA 80 100 120 VR = 3V DC, 1 MHz
amb
= 25°C)
I
I
I
I
RM
RM
V
V
RM
RM
6810V
16 19 pF
V
V
V
V
BR
BR
500 nA
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EMIF08-VID01F2 1 Electrical characteristics (T
amb
Figure 2. S21 (dB) attenuation measurement Figure 3. Analog crosstalk measurement
= 25°C)
dB
0
0
-5
-5
-10
-10
-15
-15
-20
-20
-25
-25
-30
-30
-35
-35
-40
-40
-45
-45 100k 1M 10M 100M 1G
100k 1M 10M 100M 1G
f (Hz)
Figure 4. ESD response to IEC61000-4-2
(+15 kV air discharge) on one
Input
Input 10V/d
10V/d
Output
Output 10V/d
10V/d
input V
and one output V
in
out
dB
0
0
0
0
-10
-10
-10
-10
-20
-20
-20
-20
-30
-30
-30
-30
-40
-40
-40
-40
-50
-50
-50
-50
-60
-60
-60
-60
-70
-70
-70
-70
-80
-80
-80
-80
-90
-90
-90
-90
-100
-100
-100
-100 100k 1M 10M 100M 1G
100k 1M 10M 100M 1G
100k 1M 10M 100M 1G
100k 1M 10M 100M 1G
f (Hz)
Figure 5. ESD response to IEC61000-4-2
(- 15 kV air discharge) on one
Input
Input 10V/d
10V/d
Output
Output 10V/d
10V/d
input V
and one output V
in
out
200ns/d
200ns/d
Figure 6. Line capacitance versus applied
voltage
C (pF)
LINE
28
26
24
22
20
18
16
14
12
10
012345
V (V)
LINE
200ns/d
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2 Ordering information scheme EMIF08-VID01F2

2 Ordering information scheme
EMIF vv - xxx zz F y
EMI Filter Number of lines
X: resistance (Ohms) Z: capacitance value / 10 pF or Application (3 letters) and Version (2 digits)
F: Flip chip 1: Pitch = 500 µm, Bump = 315 µm
2: Lead free Pitch = 500 µm, Bump = 315 µm

3 Package mechanical data flip chip

315 µm +/- 50
315 µm +/- 50
500µm +/-50
500µm +/-50
500µm +/-50500µm +/-50
250µm +/-50
250µm +/-50
250µm +/-50
50
50
50
-
-
-
501µm +/
501µm +/
501µm +/
315 µm +/- 50
435 µm +/-50
435 µm +/-50
435 µm +/-50
3.92 mm +/-50µm
3.92 mm +/-50µm
3.92 mm +/-50µm
650µm +/- 65
650µm +/- 65650µm +/- 65
1.29 mm +/-50µm
1.29 mm +/-50µm
1.29 mm +/-50µm1.29 mm +/-50µm
Figure 7. Marking Figure 8. Foot print recommendation
Dot, ST Logo xx = marking z = packaging
location yww = date code Dimensions in µm
365
36 5
220
240
E
E
®
®
®
xxz
xxz
xxz
y
y
y
ww
ww
ww
Copper pad Diameter :
Copper pad Diameter :
250µm recommended , 300µm max
250µm recommended , 300µm max
Solder stencil opening : 330µm
Solder stencil opening : 330µm
40
40
40
Solder mask opening recommendation :
Solder mask opening recommendation :
340µm min for 300µm copper pad diameter
340µm min for 300µm copper pad diameter
4/6
EMIF08-VID01F2 4 Ordering information

Figure 9. Flip chip tape and reel specification

Dot identifying Pin A1 location
12 +/- 0.3
12 +/- 0.3
0.73 +/- 0.05
0.73 +/- 0.05
Dot identifying Pin A1 location
ST
ST
ST
yww
yww
yww
xxz
xxz
xxz
E
E
E
User direction of unreeling
User direction of unreeling
4 +/- 0.1
4 +/- 0.1
yww
yww
yww
xxz
xxz
xxz
ST
ST
ST
E
E
E
4 +/- 0.1
4 +/- 0.1
f 1.5 +/- 0.1
f 1.5 +/- 0.1
ST
ST
ST
yww
yww
yww
xxz
xxz
xxz
E
E
E
1.75 +/- 0.1
1.75 +/- 0.1
5.5 +/- 0.5
5.5 +/- 0.5

4 Ordering information

Ordering code Marking Package Weight Base qty Delivery mode
EMIF08-VID01F2 GS Flip Chip 6.8 mg 5000 7” Tape and reel

5 Revision history

Date Revision Changes
13-Jul-2005 1 Initial release.
11-Aug-2005 2 Fonts changed in Figures 7, 8, and 9
5/6
5 Revision history EMIF08-VID01F2
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