low capacitance EMI filter and ESD protection in micro QFN package
Features
EMIF08-1502M16
8-line IPAD™
■ EMI (I/O) low-pass filter
■ High efficiency in EMI filtering:
– Greater than 30 dB attenuation at
frequencies from 900 MHz to 1.8 GHz
■ Cut-off frequency: 300 MHz
■ Very low PCB space consumption:
3.3 mm x 1.5 mm
■ Very thin package: 0.6 mm max.
■ High efficiency in ESD suppression on inputs
pins (IEC 61000-4-2 level 4)
■ High reliability offered by monolithic integration
■ High reduction of parasitic elements through
integration
■ Lead-free package
Complies with following standards:
■ IEC 61000-4-2 level 4 input pins
– 15 kV (air discharge)
– 8 kV (contact discharge)
■ MIL STD 883G - Method 3015-7 Class 3A
(all pins)
Applications
Where EMI filtering in ESD sensitive equipment is
required:
■ LCD and camera for Mobile phones
■ Computers and printers
■ Communication systems
■ MCU boards
1
Micro QFN 16L 3.3 mm x 1.5 mm
(bottom view)
Figure 1. Basic cell configuration
Input 1
Typical line capacitance = 14 pF typ. @ 2.5 V
170 Ω
Output 1
Description
The EMIF08-1502M16 is an 8-line, highly
integrated device designed to suppress EMI/RFI
noise in all systems exposed to electromagnetic
interference.
This filter includes an ESD protection circuitry,
which prevents damage to the application when
subjected to ESD surges up to 15 kV on the input
pins.
TM: IPAD is a trademark of STMicroelectronics
February 2008 Rev 2 1/10
www.st.com
Characteristics EMIF08-1502M16
1 Characteristics
Figure 2. Pin configuration (top view)
Pin 1
Input 1
Input 21
Pin 2
Input 3
Pin 3
Input 4
Pin 4
Input 5
Pin 5
Input 6
Pin 6
Input 7
Pin 7
Input 8
Pin 8
Table 1. Absolute ratings (limiting values)
Output 1
Output 2
Output 3
Output 4
Output 5
Output 6
Output 7
Output 8
Pin 16
Pin 15
Pin 14
Pin 13
Pin 12
Pin 11
Pin 10
Pin 9
Symbol Parameter Value Unit
ESD IEC 61000-4-2, air discharge on input pins
V
ESD IEC 61000-4-2, contact discharge on input pins
PP
ESD IEC 61000-4-2, contact discharge on output pins
T
T
T
Maximum junction temperature 125 °C
j
Operating temperature range - 40 to + 85 °C
op
Storage temperature range - 55 to + 150 °C
stg
2/10
15
8
kV
4
EMIF08-1502M16 Characteristics
Table 2. Electrical characteristics (T
Symbol Parameter
V
BR
I
RM
V
RM
V
CL
R
d
I
PP
R
I/O
C
line
amb
= 25 °C)
Breakdown voltage
Leakage current @ V
RM
Stand-off voltage
Clamping voltage
Dynamic resistance
Peak pulse current
Series resistance between Input & Output
Input capacitance per line
I
I
F
V
BR
V
V
RM
CL
V
F
I
RM
I
R
I
PP
V
Symbol Test conditions Min. Typ. Max. Unit
V
BR
V
F
I
RM
R
I/O
C
line
IR = 1 mA 6 8 10 V
IF = 10 mA 0.5 1.0 1.5 V
VRM = 3 V per line 100 nA
Tolerance ± 10% 153 170 187 Ω
V
= 2.5 V dc, V
LINE
= 30 mV, F = 1 MHz 12 14 16.5 pF
OSC
Figure 3. S21 attenuation measurement Figure 4. Analog cross talk measurements
0.00
- 15.00
-
- 30.00
-
- 45.00
-
dB
F (Hz)
1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G
dB
0.00
0.00
-10.00
-10.00
-20.00
-20.00
-30.00
-30.00
-40.00
-40.00
-50.00
-50.00
-60.00
-60.00
-70.00
-70.00
-80.00
-80.00
-90.00
-90.00
-100.00
-100.00
100.0k 1.0M 10.0M 100.0M 1.0G
100.0k 1.0M 10.0M 100.0M 1.0G
F (Hz)
3/10
Ordering information scheme EMIF08-1502M16
Figure 5. ESD response to IEC 61000-4-2
(+15 kV air discharge) on one input
(V
) and on one output (V
in
out
)
Figure 6. ESD response to IEC 61000-4-2
(- 15 kV air discharge) on one input
(Vin) and on one output (V
Figure 7. Line capacitance versus reverse voltage applied (typical value)
C
(pF)
LINE
24
22
20
18
16
14
12
10
8
6
4
2
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
V
(V)
LINE
out
)
2 Ordering information scheme
Figure 8. Ordering information scheme
EMI Filter
Number of lines
Information
x = resistance value (Ohms)
z = capacitance value / 10 (pF)
Package
Mx = Micro QFN x leads
4/10
EMIF yy - xxx z Mx
EMIF08-1502M16 Package information
3 Package information
● Epoxy meets UL94, V0
In order to meet environmental requirements, ST offers these devices in ECOPACK
packages. These packages have a lead-free second level interconnect. The category of
second level interconnect is marked on the inner box label, in compliance with JEDEC
Standard JESD97. The maximum ratings related to soldering conditions are also marked on
the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at
www.st.com.
Table 3. Micro QFN 3.3x1.5 16L dimensions
TOP VIEW
D
Ref.
Millimeters Inches
Dimensions
®
INDEX AREA
(D/2 x E/2)
SIDE VIEW
A
BOTTOMVIEW
e
INDEX AREA
(D/2 x E/2)
PIN # 1 ID
L
b
D2
E
A1
EXPOSED PAD
K
Figure 9. Micro QFN 3.3x1.5 16L
footprint (dimensions in mm)
0.40
0.60
0.35
0.20
Min. Typ. Max. Min. Typ. Max.
A 0.50 0.55 0.60 0.020 0.022 0.024
A1 0.00 0.02 0.05 0.000 0.001 0.002
b 0.15 0.20 0.25 0.006 0.008 0.010
D 3.20 3.30 3.40 0.126 0.130 0.134
D2 2.45 2.60 2.70 0.096 0.102 0.106
E 1.40 1.50 1.60 0.055 0.059 0.063
E2 0.20 0.35 0.45 0.008 0.014 0.018
E2
e 0.40 0.016
K0.20 0.008
L 0.20 0.30 0.40 0.008 0.012 0.016
Figure 10. Marking
Dot : Pin 1 Identification
X X= Marking
WW= DataCode (week)
Y=Data code(Year)
P=Assembly plant
0.275
XX
XX
XX
WW
WW
WW
2.60
YP
YP
YP
5/10
Package information EMIF08-1502M16
Figure 11. Tape and reel specification
12.00 ± 0.3
3.70 ± 0.1
0.80 ± 0.1
All dimensions in mm
Dot identifying Pin A1 location
WW
4.00 ± 0.1
XX
YP
XX
WW
YP
1.70 ± 0.1
2.00 ± 0.1
XX
WW
YP
4.00 ± 0.1
XX
WW
YP
User direction of unreeling
XX
WW
YP
Ø 1.55 ± 0.05
XX
WW
YP
1.75 ± 0.1 5.5 ± 0.1
Note: Product marking may be rotated by 90° for assembly plant differentiation. In no case should
this product marking be used to orient the component for its placement on a PCB. Only pin 1
mark is to be used for this purpose.
6/10
EMIF08-1502M16 Recommendation on PCB assembly
4 Recommendation on PCB assembly
4.1 Stencil opening design
1. General recommendation on stencil opening design
a) Stencil opening dimensions: L (Length), W (Width), T (Thickness).
Figure 12. Stencil opening dimensions
L
T
W
b) General design rule
Stencil thickness (T) = 75 ~ 125 µm
W
Aspect Ratio
Aspect Area
-----
1.5≥=
T
LW×
---------------------------2T L W+()
0.66≥=
2. Reference design
a) Stencil opening thickness: 100 µm
b) Stencil opening for central exposed pad: Opening to footprint ratio is 50%.
c) Stencil opening for leads: Opening to footprint ratio is 90%.
Figure 13. Recommended stencil window position
5µm 5µm
15 µm
0.60
50 µm
0.40
0.20
2.60
Footprint
Stencil window
Footprint
350 µm
390 µm
600 µm
570 µm
190 µm
15 µm
200 µm
2600 µm
250 µm
1820 µm
0.35
50 µm
390 µm
0.275
7/10
Recommendation on PCB assembly EMIF08-1502M16
4.2 Solder paste
1. Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
2. “No clean” solder paste is recommended.
3. Offers a high tack force to resist component movement during high speed
4. Solder paste with fine particles: powder particle size is 20-45 µm.
4.3 Placement
1. Manual positioning is not recommended.
2. It is recommended to use the lead recognition capabilities of the placement system, not
the outline centering
3. Standard tolerance of ± 0.05 mm is recommended.
4. 3.5 N placement force is recommended. Too much placement force can lead to
squeezed out solder paste and cause solder joints to short. Too low placement force
can lead to insufficient contact between package and solder paste that could cause
open solder joints or badly centered packages.
5. To improve the package placement accuracy, a bottom side optical control should be
performed with a high resolution tool.
6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is
recommended during solder paste printing, pick and place and reflow soldering by
using optimized tools.
4.4 PCB design preference
1. To control the solder paste amount, the closed via is recommended instead of open
vias.
2. The position of tracks and open vias in the solder area should be well balanced. The
symmetrical layout is recommended, in case any tilt phenomena caused by
asymmetrical solder paste amount due to the solder flow away.
8/10
EMIF08-1502M16 Ordering information
4.5 Reflow profile
Figure 14. ST ECOPACK® recommended soldering reflow profile for PCB mounting
Temperature (°C)
Temperature (°C)
260°C max
260°C max
255°C
255°C
220°C
220°C
180°C
180°C
125 °C
125 °C
3°C/s max
3°C/s max
0
0
012345 67
012345 67
10-30 sec
10-30 sec
90 to 150 sec
90 to 150 sec
90 sec max
90 sec max
2°C/s recommended
2°C/s recommended
6°C/s max
6°C/s max
Time (min)
Time (min)
Note: Minimize air convection currents in the reflow oven to avoid component movement.
5 Ordering information
Table 4. Ordering information
Order code Marking Package Weight Base qty Delivery mode
EMIF08-1502M16 G8
1. The marking can be rotated by 90° to differentiate assembly location
(1)
Micro QFN 7.2 mg 3000 Tape and reel (7”)
6 Revision history
Table 5. Document revision history
Date Revision Changes
24-Oct-2006 1 Initial release.
04-Feb-2008 2
Reformatted to current standards. Updated ECOPACK statement.
Added Section 4: Recommendation on PCB assembly.
9/10
EMIF08-1502M16
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10/10
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