ST EMIF07-LCD02F3 User Manual

EMIF07-LCD02F3

7-line IPAD™, EMI filter and ESD protection for LCD and cameras

Features

■EMI symmetrical (I/O) low-pass filter

■High efficiency in EMI filtering

■Lead-free package

■Very low PCB space occupation: 1.94 mm x 1.54 mm

■Very thin package: 0.65 mm

■High efficiency in ESD suppression

■High reliability offered by monolithic integration

■High reduction of parasitic elements through integration and wafer level packaging

Complies with the following standards

■IEC 61000-4-2 level 4 on inputs and outputs:

–15 kV (air discharge)

–8 kV (contact discharge)

■MIL STD 883G - Method 3015-7 Class 3

Applications

Where EMI filtering in ESD sensitive equipment is required:

■LCD for mobile phones

■Computers and printers

■Communication systems

■MCU boards

Description

Flip Chip (18 bumps)

Figure 1. Pin layout (bump side)

5	4	3	2	1
O1	O2	GND	I1	I2	A
O3		GND		I3	B
O4	O5	GND	I4	I5	C
O6	O7	GND	I6	I7	D

Figure 2. Device configuration

	Low-pass Filter
Input			Output
			Ri/o = 70 Ω
GND	GND	GND	Cline = 30 pF

The EMIF07-LCD02F3 is a 7-line highly integrated device designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interference. The EMIF07 Flip Chip package means the package size is equal to the die size.

This filter includes ESD protection circuitry, which prevents damage to the protected device when subjected to ESD surges up 15 kV.

TM: IPAD is a trademark of STMicroelectronics.

February 2010

Doc ID 11639 Rev 3

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www.st.com

Characteristics	EMIF07-LCD02F3

1 Characteristics

Table 1.

Absolute maximum ratings (Tamb = 25 °C)

Symbol

Parameter and test conditions

Value

Unit

Tj

Maximum junction temperature

125

°C

Top

Operating temperature range

-40 to +85

°C

Tstg

Storage temperature range

-55 to 150

°C

Table 2.

Electrical characteristics (Tamb = 25 °C)

Symbol

Parameters

I

VBR

Breakdown voltage

IF

IRM

Leakage current @ VRM

VRM

Stand-off voltage

VF

VCL

Clamping voltage

VCL VBR VRM

V

IRM

IR

IPP

Peak pulse current

RI/O

Series resistance between input and output

IPP

Cline

Input capacitance per line

Symbol

Test conditions

Min

Typ

Max

Unit

VBR

IR = 1 mA

6

8

10

V

IRM

VRM = 3 V

50

200

nA

R2

Tolerance ± 20%

70

Ω

Cline

Vline = 0 V, VOSC = 30 mV, F =1 MHz

30

pF

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EMIF07-LCD02F3									Characteristics
Figure 3. Attenuation measurement and					Figure 4. Analog cross talk measurement
	Aplac simulation
dB					dB
					0.00
0.00
					-10.00
-10.00					-20.00
					-30.00
-20.00					-40.00
					-50.00
-30.00
					-60.00
-40.00					-70.00
				F (Hz)	-80.00
-50.00					-90.00				F (Hz)
100.0k	1.0M	10.0M	100.0M	1.0G
	Line 1			Line 2	-100.00
	Line 3			Line 4	100.0k	1.0M	10.0M	100.0M	1.0G
	Line 5			Line 6
	Line 7							Xtalk 1/2
Figure 5. Voltages when IEC 61000-4-2					Figure 6.	Voltages when IEC 61000-4-2
	(+15 kV air discharge) applied to					(-15 kV air discharge) applied to
	input pin					input pin
10 V/div					10 V/div
									Input

Input

10 V/div

10 V/div

Output

100 ns/div	Output
	100 ns/div

Figure 7. Line capacitance versus applied voltage

Cline (pF)

30

25

20

15

10

5

Vline (V)

0

0

1

2

3

4

5

6

Doc ID 11639 Rev 3

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