ST EMIF06-MSD02N16 User Manual

6-line IPAD™, EMI filter and ESD protection
Features
High design flexibility
Lead free package
Very low PCB space consumption:
3.5 mm x 1.2 mm
High efficiency in ESD suppression
IEC 61000-4-2 level 4
High reliability offered by monolithic integration
High reduction of parasitic elements through
integration and µQFN packaging
Complies with following standards:
IEC 61000-4-2 level 4 external pins
Applications
Mobile telephones,
Navigation systems
Digital still cameras
Portable devices.
EMIF06-MSD02N16
Micro QFN 16L 3.5 mm x 1.2 mm
(bottom view)

Figure 1. Pin configuration

1
GND
RDATA_VCC
VCC
DAT2_Ex
DAT3_Ex
CMD_Ex
CLK_Ex
DAT0_Ex
DAT1_Ex
WP/CD
RDAT3_GND
DAT2_In
DAT3_In
CMD_In
CLK_In
DAT0_In
DAT1_In

Figure 2. Schematic circuit diagram

1
Description
Vcc
R12
The EMIF06-MSD02N16 is a highly integrated device designed to suppress EMI/RFI noise for interface line filtering. It is packaged in micro QFN.
This filter includes ESD protection circuitry, which prevents damage to the protected device when subjected to ESD surges.
DAT2_In
DAT2_In
DAT3_In
DAT3_In
CMD_In
CMD_In
CLK_In
CLK_In
DAT0_In
DAT0_In
DAT1_In
DAT1_In
DAT3 pull-up
DAT3 pull-up
GND
GND
DAT3 pull-down
DAT3 pull-down
R7
R7
R13
R13
R8 R9
R8 R9
R10 R11
R10 R11
R12
R1
R1
R2
R2
R3
R3
R4
R4
R5
R5
R6
R6
TM: IPAD is a trademark of STMicroelectronics
November 2008 Rev 1 1/12
Vcc
WP/CD
WP/CD
DAT2_Ex
DAT2_Ex
DAT3_Ex
DAT3_Ex
CMD_Ex
CMD_Ex
CLK_Ex
CLK_Ex
DAT0_Ex
DAT0_Ex
DAT1_Ex
DAT1_Ex
GND
GND
www.st.com
Characteristics EMIF06-MSD02N16

1 Characteristics

Table 1. Absolute ratings (limiting values)

Symbol Parameter Value Unit
ESD IEC 61000-4-2 Contact discharge on DATx_In, CMD_In and CLK_In pins
V
PP
On all other pins Contact discharge Air discharge
T
T
op
T
stg
Table 2. Electrical characteristics (T
Maximum junction temperature 125 °C
j
Operating temperature range - 30 to + 85 °C
Storage temperature range - 55 to + 150 °C
Symbol Parameter
C
V
I
V
V
R
I
R
LINE
Breakdown voltage
BR
Leakage current @ V
RM
Stand-off voltage
RM
Clamping voltage
CL
Dynamic resistance
d
Peak pulse current
PP
Series resistance between Input & Output
I/O
RM
Input capacitance per line
amb
= 25 °C)
I
I
F
V
BR
V
V
RM
CL
2
8
12
V
F
I
RM
I
R
I
PP
Symbol Test conditions Min. Typ. Max. Unit
kV
V
V
BR
I
RM
R1, R2, R3, R4, R5, R
R
, R8, R9, R10, R11, R12Pull-up resistors 80 90 100 kΩ
7
IR = 1 mA 5 8 V
VRM = 3 V 200 nA
Series resistors - tolerance ±20% 36 45 54 Ω
6
R13 Pull-down resistor - tolerance ±20% 375 470 565 kΩ
V
= 0 V, V
C
line
LINE
(under zero light conditions)
= 30 mV, F = 1 MHz
OSC
20 pF
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EMIF06-MSD02N16 Characteristics
Figure 3. S21 attenuation measurement Figure 4. Analog cross talk measurements
dB
0.00
-10.00
-20.00
-30.00
-40.00
F (Hz)
-50.00
100.0k 1.0M 10.0M 100.0M 1.0G
DAT0 DAT1 DAT2 DAT3
CLK CMD
Figure 5. ESD response to IEC 61000-4-2
(+12 kV air discharge) on one input (V
) and on one output (V
in
55 V Max
IN
out
)
Figure 6. ESD response to IEC 61000-4-2
0.00
-10.00
-20.00
-30.00
-40.00
-50.00
-60.00
-70.00
-80.00
-90.00
-100.00
-110.00
-120.00
-130.00
-140.00
dB
F (Hz)
100.0k 1.0M 10.0M 100.0M 1.0G
-DAT3
DAT2
DAT2
-DAT1
(- 12 kV air discharge) on one input (Vin) and on one output (V
IN
-41 V Max
OUT
out
)
39 V Max
OUT
-34 V Max

Figure 7. Line capacitance versus reverse voltage applied on DATx and CMD line

C
(pF)
LINE
16
14
12
10
8
6
4
V
(V)
2
0
0.0 1.0 2.0 3.0 4.0 5.0
LINE
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Application information EMIF06-MSD02N16

2 Application information

The EMIF06-mSD02N16 is a dedicated interface device for micro SD card/T-Flash card in mobile phones. The device provides:
ESD protection
EMI filterering
Pull-up resistors
Card detection circuit

2.1 ESD protection

Each pin is connected to a TVS diode able to withstand 12 kV on all pins except on DATx_In, CMD_In and CLK_In.

2.2 EMI filtering

DATx, CMD and CLK lines are immunized against EMI radiations thanks to pi-filters. To avoid any degradation of the signal integrity at high frequency, the total line capacitance stays lower than 20 pF making the device compatible with a clock frequency up to 52 MHz.

2.3 Pull-up resistors

As recommended by the SD Specifications (Part 1 Physical Layer Version 2.00), all the data lines DATx and the CMD line must be pulled-up with resistors of 10 to 100 kΩ to avoid bus floating not only in SD 4-bit mode but also in SD 1-bit and SPI mode.
For the EMIF06-MSD02N16 device the pull-up resistor value has been fixed at 90 kΩ. This value makes the EMIF06-MSD02N16 compatible with most of the level shifters that may be used in the circuit including auto direction-sensing translators known to exhibit a weak current output.

2.4 Card detection circuit

The EMIF06-mSD02N16 provides the flexibility to use either mechanical card detection with a dedicated pin connected to the memory card slot or the electrical card detection using the internal pull resistor of DAT3 of the micro SD card/T-Flash card.
In case of mechanical card detection, the user must add a pull-up on the circuit connected to the CD (Card Detect) of the micro-SD/T-Flash slot as shown in Figure 8.
4/12
EMIF06-MSD02N16 Application information

Figure 8. Mechanical card detection

V
DD
Pull - up resistor
Host
controller
GND
GND
WP/CD
Contact when inserting the card
SD card
A pull-up of 90 kΩ is embedded into the EMIF06-MSD02N16. The routing corresponding to the mechanical card detection configuration is shown in Figure 9.

Figure 9. Circuit routing for mechanical card detection

Card detect pin Card detect host input
Pin 1–DAT2
Pin 2–CD/DAT3
Pin 3–CMD
Pin 4 –VCC
Pin 5–CLK
Pin 6–GND
Pin 7–DAT0
Pin 8–DAT1
Top level DAT3 pull-up Card detect pull
NC
HOST CONTROLLERHOST CONTROLLER
NC
HOST CONTROLLERHOST CONTROLLER
-
up
Card detect pinCard detect host input
Pin 1DAT2
Pin 2CD/DAT3
Pin 3CMD
Pin 4VCC
Pin 5CLK
Pin 6GND
Pin 7DAT0
Pin 8DAT1
Top level DAT3 pull-up Card detect pull-up
Bottom view Top view
In case of electrical card detection, the user must add a pull-down on the circuit connected to the CD/DAT3 pin of the micro-SD/T-Flash pin as shown in Figure 10.

Figure 10. Electrical card detection

Host
controller
DAT3 (CD)
Pull - down resistor
GND
50 kΩ
V
DD
0
SD card
5/12
Ordering information scheme EMIF06-MSD02N16
A pull-down of 470k is embedded into the EMIF06-mSD02N16. The routing corresponding to the electrical card detection configuration is shown in the Figure 11.

Figure 11. Circuit routing for electrical card detection

NC
Pin 1–DAT2
Pin 1–DAT2
Pin 2CD/DAT3
Pin 2 –CD/DAT3
Pin 3
Pin 3 –
CMD
CMD
Pin 4
Pin 4 –
VCC
VCC
Pin 5
Pin 5–
CLK
CLK
Pin 6
Pin 6 –
GND
GND
Pin 7–DAT0
Pin 7–DAT0
Pin 8–DAT1
Pin 8–DAT1
Top level
Top level DAT3 pull
DAT3 pull-down
HOST CONTROLLERHOST CONTROLLER
HOST CONTROLLERHOST CONTROLLER
Bottom view Top view

3 Ordering information scheme

Figure 12. Ordering information scheme

EMI Filter
Number of lines
NC
Pin 1DAT2
Pin 1DAT2
Pin 2CD/DAT3
Pin 2CD/DAT3
Pin 3CMD
Pin 3CMD
Pin 4VCC
Pin 4VCC
Pin 5CLK
Pin 5CLK
Pin 6GND
Pin 6GND
Pin 7DAT0
Pin 7DAT0
Pin 8DAT1
Pin 8DAT1
EMIF 06 - MSD02 N16
Top level
Top level DAT3 pull-down
DAT3 pull-down
Information
MSD = application 02 = version
Packag e
N = narrow micro QFN 16 = 16 leads
6/12
EMIF06-MSD02N16 Package information

4 Package information

Epoxy meets UL94, V0
®
In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at
www.st.com.

Table 3. Micro QFN 3.5x1.2 16L dimensions

Dimensions
E
Index area
Pin 1
E2
k
1
D
M
D2
b
e
1
b1
Figure 13. Micro QFN 3.5x1.2 16L
footprint (dimensions in mm)
3.00
Ref.
A
Millimeters Inches
Min. Typ. Max. Min. Typ. Max.
A 0.45 0.50 0.55 0.018 0.020 0.022
A1 0.00 0.05 0.000 0.002
b 0.15 0.20 0.25 0.006 0.008 0.010
b1 0.25 0.30 0.35 0.010 0.012 0.014
A1
D 3.45 3.50 3.55 0.136 0.138 0.140
D2 2.70 2.80 2.90 0.106 0.110 0.114
E 1.15 1.20 1.25 0.045 0.047 0.049
L
L1
E2 0.25 0.30 0.40 0.010 0.012 0.016
e 0.40 0.016
k 0.20 0.008
L 0.20 0.25 0.30 0.008 0.010 0.012
L1 0.15 0.006
M 0.20 0.008

Figure 14. Marking

Dot : Pin 1 Identification N6 = Marking
1.6 0.70
0.40
2.30
0.30
0.45
0.20
N6
7/12
Package information EMIF06-MSD02N16

Figure 15. Tape and reel specification

12.00 ± 0.3
3.70 ± 0.1
0.80 ± 0.1
All dimensions in mm
Dot identifying Pin A1 location
2.00 ± 0.1
4.00 ± 0.1
N6 N6
1.70 ± 0.1
N6
User direction of unreeling
N6
4.00 ± 0.1
N6
Ø 1.55 ± 0.05
N6
1.75 ± 0.1 5.5 ± 0.1
Note: Product marking may be rotated by 90° for assembly plant differentiation. In no case should
this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose.
8/12
EMIF06-MSD02N16 Recommendation on PCB assembly

5 Recommendation on PCB assembly

5.1 Stencil opening design

1. General recommendation on stencil opening design
a) Stencil opening dimensions: L (Length), W (Width), T (Thickness).

Figure 16. Stencil opening dimensions

L
T
W
b) General design rule
Stencil thickness (T) = 75 ~ 125 µm
W
Aspect Ratio
Aspect Area
-----
1.5=
T
LW×
---------------------------­2T L W+()
0.66=
2. Reference design
a) Stencil opening thickness: 100 µm
b) Stencil opening for central exposed pad: Opening to footprint ratio is 50%.
c) Stencil opening for leads: Opening to footprint ratio is 90%.

Figure 17. Recommended stencil window position

5µm 5µm
15 µm
450 µm
300 µm
350 µm
200 µm
420 µm
190
200
µm
µm
2800 µm
2100
15 µm
1.6 0.70
50 µm
µm
50 µm
350 µm
3.00
2.30
0.40
Footprint
Stencil window
Footprint
0.30
0.45
0.20
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Recommendation on PCB assembly EMIF06-MSD02N16

5.2 Solder paste

1. Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
2. “No clean” solder paste is recommended.
3. Offers a high tack force to resist component movement during high speed
4. Solder paste with fine particles: powder particle size is 20-45 µm.

5.3 Placement

1. Manual positioning is not recommended.
2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering
3. Standard tolerance of ± 0.05 mm is recommended.
4. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages.
5. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool.
6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools.

5.4 PCB design preference

1. To control the solder paste amount, the closed via is recommended instead of open vias.
2. The position of tracks and open vias in the solder area should be well balanced. The symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away.
10/12
EMIF06-MSD02N16 Ordering information

5.5 Reflow profile

Figure 18. ST ECOPACK® recommended soldering reflow profile for PCB mounting

Temperature (°C)
Temperature (°C)
260°C max
260°C max
255°C
255°C
220°C
220°C
180°C
180°C
125 °C
125 °C
3°C/s max
3°C/s max
0
0
012345 67
012345 67
10-30 sec
10-30 sec
90 to 150 sec
90 to 150 sec
90 sec max
90 sec max
2°C/s recommended
2°C/s recommended
6°C/s max
6°C/s max
Time (min)
Time (min)
Note: Minimize air convection currents in the reflow oven to avoid component movement.

6 Ordering information

Table 4. Ordering information

Order code Marking Package Weight Base qty Delivery mode
EMIF06-MSDN16 N6
1. The marking can be rotated by 90° to differentiate assembly location
(1)
Micro QFN 6.17 mg 3000 Tape and reel (7”)

7 Revision history

Table 5. Document revision history

Date Revision Changes
21-Nov-2008 1 Initial release.
11/12
EMIF06-MSD02N16
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