ST EMIF06-mSD02C3 User Manual

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Features

■ EMI low-pass filter

■ ESD protection ±15 kV (IEC 61000-4-2)

■ Integrated pull up resistors to prevent bus

floating when no card is connected

■ 50 MHz clock frequency compatibility with

< 20 pF

line

■ Low power consumption

■ Easy layout thanks to smart pin-out

configuration

■ Very low PCB space consuming

■ High reliability offered by monolithic integration

■ Reduction of parasitic elements thanks to CSP

integration

■ Lead-free package

EMIF06-mSD02C3

Mini and micro-SD card IPAD™

EMI filtering and ESD protection

Flip Chip

(16 bumps)

Figure 1. Pin configuration (bump side)

1234

Complies with the following standards:

■ IEC 61000-4-2 level 4

– 15 kV (air discharge) – 8 kV (contact discharge)

■ MIL STD 883G - Method 3015-7 Class 3A

■ SD Specification Part 1, Physical Layer

Specification, Version 2.0

Application

Mini and micro (T-Flash) secure digital memory card in:

■ Mobile phones

■ Communication systems

Description

The EMIF06-mSD02C3 is a highly integrated device based on IPAD technology offering two functions: ESD protection to comply with IEC standard, and EMI filtering to reject mobile phone frequencies.

TM: IPAD is a trademark of STMicroelectronics

August 2010 Doc ID 16910 Rev 1 1/11

www.st.com

Characteristics EMIF06-mSD02C3

1 Characteristics

Table 1. Absolute ratings (limiting values)

Symbol Parameter Value Unit

ESD discharge IEC 61000-4-2, air discharge

ESD discharge IEC 61000-4-2, contact discharge

Maximum input voltage 5.5 V

Maximum junction temperature 125 °C

Operating temperature range - 40 to + 85 °C

Storage temperature range - 55 to + 150 °C

stg

15 15

Figure 2. EMIF06-mSD02C3 configuration

Vcc

R11

R10

R12

R13

Clk

CMD

HOST CARD

Data0 Data1 Data2

Data3/CD

GND bumps must be connected together

SDClk SDCMD SDData0 SDData1 SDData2 SDData3/CD

Table 2. Pin configuration

Pin Signal Pin Signal

A1 DATA0 C1 CMD

A2 DATA1 C2 V

A3 SDDATA1 C3 V

A4 SDDATA0 C4 SDCMD

B1 CLK D1 DATA3/CD

B2 V

B3 V

B4 SDCLK D4 SDDATA3/CD

2/11 Doc ID 16910 Rev 1

D2 DATA2

D3 SDDATA2

EMIF06-mSD02C3 Characteristics

Table 3. Electrical characteristic

Symbol Test conditions Min. Typ. Max. Unit

IR = 1 mA 14 16 V

VRM = 3 V 0.1 µA

R1, R2, R3, R4, R5, R6 Tolerance ± 20 % 40 Ω

R10, R11, R12, R13 Tolerance ± 30 % 56 kΩ

R9 Tolerance ± 30 % 4.7 kΩ

line

V = 0 V, F = 1 MHz, V

= 30 mV 15 20 pF

OSC

Figure 3. S21 attenuation measurements Figure 4. Analog crosstalk measurements

0.00

-10.00

-20.00

-30.00

-40.00

-50.00

-60.00

=0 V

BIAS

100.0k 1.0M 10.0M 100.0M 1.0G

DATA 0 DATA 2

CMD

F (Hz)

DATA 1

DATA3/CD

Clk

0.00

-10.00

-20.00

-30.00

-40.00

-50.00

-60.00

-70.00

-80.00

=0 V

BIAS

F (Hz)

100.0k 1.0M 10.0M 100.0M 1.0G

DATA0-SDDATA1

DATA0-SDDATA3

Figure 5. ESD response to IEC 61000-4-2

(+15 kV air discharge) on CLK and data lines

20 V/div

Input

5 V/div

Output

100 ns/div

Figure 6. ESD response to IEC 61000-4-2

(-15 kV air discharge) on CLK and data lines

Input

20 V/div

Output

10 V/div

100 ns/div

Doc ID 16910 Rev 1 3/11

Characteristics EMIF06-mSD02C3

Figure 7. ESD response to IEC 61000-4-2

10 V/div

(+15 kV air discharge) on V

100 ns/div

Figure 9. Digital crosstalk test setup

Agilent pulse pattern

generator 81110A

=3 V

OUT

=2 ns (open)

R=tF

F=8.3 MHz

Input Line “A”

line

Figure 8. ESD response to IEC 61000-4-2

(-15 kV air discharge) on VCC line

10 V/div

100 ns/div

LeCroy Wavesurfer 64Xs

600 MHz – 2.5Gs/s Oscilloscope

Direct input on 50Ω

Voltage Probe LeCroy HFP1000 100 k Ω / 0.7 pF

Output line “B”

Input Line “B”: 50 Ω & Open

•T

Figure 10. Digital crosstalk

100 mV/div

1 V/div

AMB

5050Ω

=25 °C

SDData0

Clk

100 ns/div

4/11 Doc ID 16910 Rev 1

EMIF06-mSD02C3 Characteristics

Figure 11. Step response test setup

LeCroy WavePro 7300A

3 GHz – 20 Gs/s Oscilloscope

Agilent pulse pattern

generator 81110A

=3 V

OUT

=2 ns

R=tF

(values set in open) F=8.3 MHz

•T

AMB

Input Line “A”

=25 °C

Figure 12. Step response without the filter

1 V/div

SDDatax/CMD/Clk

rise@lv = 885 ps, fall@lv = 886 ps

20% - 70% (SD standard)

Voltage probe LeCroy HFP1000 (100 kΩ - 0.7 pF)

=15 pF

LOAD

Output Line “A” Notes:

- Voltage amplitude set to 3V

- Total capacitance load 15 pF

(5 pF for PCB parasitic capacitance and voltage probe capacitance, 10 pF forSdcard)

C = 15 pF

LOAD

F = 52 MHz V = 3 V

5 ns/div

Figure 13. Step response with the filter

1 V/div

rise@lv = 1.705 ns, fall@lv = 2.426 ns

20% - 70% (SD standard)

SDDatax/CMD/Clk

C = 15 pF

LOAD

F = 52 MHz V = 3 V

5 ns/div

Doc ID 16910 Rev 1 5/11

Characteristics EMIF06-mSD02C3

Figure 14. Junction capacitance versus reverse applied voltage (typical values)

C(pF)

20.0

18.0

16.0

14.0

12.0

10.0

8.0

6.0

4.0

2.0

0.0 01234

C1_CMD

A1_Data0

A2_Data1

D2_Data2

D1_Data3

B1_Clk

F=10Mhz

V=30mV

osc RMS

T=25°C

V (V)

6/11 Doc ID 16910 Rev 1

EMIF06-mSD02C3 Technical information

2 Technical information

Figure 15. T-Flash recommended connection

DATRCMD

CMD

DAT0~3

CLK

HOST

C1C2C

Pin 1

Pin 2

Pin 3

Pin 4

Pin 5

Pin 6

Pin 7

Pin 8

EMIF06-MSD02C3

Pull-up resistances R

DAT

and R

are included to prevent bus floating when no card is

CMD

inserted or when all card drivers are in high impedance mode.

The pull-up resistors and capacitors described in the above recommendation are integrated in the EMIF06-mSD02C3. This makes the EMIF06-mSD02C3 an easy "plug and play" solution to implement secured T-Flash, mini-SD and micro-SD card terminations.

Figure 16. Recommendation layout

VCC

DAT 1

DAT 0

CLK

CMD

DAT3/CD

DAT 2

GND

Input Output

Top level

Second level

DAT 1

DAT 0

VSS

CLK

VCC

CMD

DAT3/CD

DAT 2

Top view: GND bumps must be connected together

Doc ID 16910 Rev 1 7/11

Ordering information scheme EMIF06-mSD02C3

3 Ordering information scheme

Figure 17. Ordering information scheme

EMIF yy - xxx zz Cx

EMI filter

Number of lines

Information

x = resistance value (Ohms) z = capacitance value / 10(pF) or 3 letters = application 2 digits = version

Package

C = Coated Flip Chip x = 3: Lead-free, pitch = 400 µm, bump = 255 µm

8/11 Doc ID 16910 Rev 1

EMIF06-mSD02C3 Package information

4 Package information

● Epoxy meets UL94, V0

● Lead-free package

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK specifications, grade definitions and product status are available at: www.st.com ECOPACK

packages, depending on their level of environmental compliance. ECOPACK®

is an ST trademark.

Figure 18. Package dimensions

400 µm ± 40

255 µm ± 40

170 µm ± 10

400 µm ± 40

1.54 mm ± 40 µm

170 µm ± 10

1.54 mm ± 40 µm

650 µm ± 60

Figure 19. Footprint Figure 20. Marking

Copper pad Diameter: 220 µm recommended 260 µm maximum

Solder mask opening: 300 µm minimum

Solder stencil opening: 220 µm recommended

Doc ID 16910 Rev 1 9/11

Dot, ST logo

ECOPACK status xx = marking z = manufacturing

location

yww = datecode

y = year, ww = week

x y

wxw

Ordering information EMIF06-mSD02C3

Figure 21. Tape and reel specification

Dot identifying Pin A1 location

2.0 ± 0.05

0.20 ± 0.02

1.68 ± 0.05

8.0 ± 0.3

0.73 ± 0.05

All dimensions in mm

5 Ordering information

Table 4. Ordering information

yww

xxz

4.0 ± 0.1

yww

xxz

1.68 ± 0.05

User direction of unreeling

4.0 ± 0.1

Ø 1.55 ± 0.05

yww

xxz

1.75 ± 0.1

3.5 ±- 0.05

Order code Marking Package Weight Base qty Delivery mode

EMIF06-MSD02C3 JP Flip Chip 3.2 mg 5000 Tape and reel 7”

Note: More information is available in the application notes:

AN2348: “Flip Chip: Package description and recommendations for use” AN1751: "EMI Filters: Recommendations and measurements"

6 Revision history

Table 5. Document revision history

Date Revision Changes

12-Aug-2010 1 First issue.

10/11 Doc ID 16910 Rev 1

EMIF06-mSD02C3

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Doc ID 16910 Rev 1 11/11

ST EMIF06-mSD02C3 User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

Figure 1. Pin configuration (bump side)

1 Characteristics

Table 1. Absolute ratings (limiting values)

Figure 2. EMIF06-mSD02C3 configuration

Table 2. Pin configuration

Table 3. Electrical characteristic

Figure 9. Digital crosstalk test setup

Figure 10. Digital crosstalk

Figure 11. Step response test setup

Figure 12. Step response without the filter

Figure 13. Step response with the filter

Figure 14. Junction capacitance versus reverse applied voltage (typical values)

2 Technical information

Figure 15. T-Flash recommended connection

Figure 16. Recommendation layout

3 Ordering information scheme

Figure 17. Ordering information scheme

4 Package information

Figure 19. Footprint Figure 20. Marking

Figure 21. Tape and reel specification

5 Ordering information

Table 4. Ordering information

6 Revision history

Table 5. Document revision history