ST EMIF06-1002F2 User Manual

6-line IPAD™, EMI filter and ESD protection

Features

■ Lead-free package

■ Very low PCB space consumption

1.92 mm x 1.79 mm

■ Very thin package: 0.65 mm

■ High efficiency in ESD suppression

(IEC 61000-4-2 level 4 on external pins)

■ High reliability offered by monolithic integration

■ High reduction of parasitic elements through

integration and wafer level packaging

Complies with the following standards

■ IEC 61000-4-2 level 4:

– 15 kV (air discharge)
– 8 kV (contact discharge)

EMIF06-1002F2

Flip Chip

(14 bumps)

Figure 1. Pin configuration (bump side)

43 2 1

43 2 1

Application

This device is designed for EMI filtering in ESD
sensitive equipment such as mobile phones.

Description

The EMIF06-1002F2 is a highly integrated device
designed to suppress EMI/RFI noise in all
systems subjected to electromagnetic
interference. The EMIF06-1002F2 Flip Chip
packaging means the package size is equal to the
die size.

This filter includes an ESD protection circuitry
which prevents damage to the application when
subjected to ESD surges up 15 kV. This device
includes 6 EMI filters.

TM: IPAD is a trademark of STMicroelectronics.

O2

A

O3

O4

O5

A

B

B

C

C

D

D

E

E

F

F

G

G

I2

O1

I1

I3

GND

GND

I4

O6

I6

I5

Figure 2. Basic cell configuration

External pin

External pin

Internal pin

Internal pin

March 2010 Doc ID 14730 Rev 2 1/7

www.st.com

7

Electrical characteristics EMIF06-1002F2

1 Electrical characteristics

Table 1. Absolute maximum ratings

(1)

Symbol Parameter Value Unit

ESD discharge IEC 61000-4-2, level 4 on external pins (I1 to I6)

Air discharge

V

PP

Contact discharge

Air discharge on internal pins (O1 to O6)
Contact discharge on internal pins (O1 to O6)

Junction temperature range -30 to 125 °C

T

j

T

1. (Tamb = 25 °C)

Table 2. Electrical characteristics

Storage temperature range -55 to 150 °C

stg

Symbol Parameters

V

BR

I

RM

V

RM

V

CL

R

I

PP

R

I/O

C

line

Breakdown voltage

Leakage current @ V

RM

Stand-off voltage

Clamping voltage

Dynamic impedance

d

Peak pulse current

Series resistance between input and
output

Input capacitance per line

(1)

VCL

IF

VRMVBR

15

8

2
2

I

VF

IRM
IR

IPP

kV

V

Symbol Test conditions Min Typ Max Unit

V

BR

I

RM

R

I/O

C

line

F

C

1. (Tamb = 25 °C)

IR = 1 mA 6 V

VRM = 3 V 200 nA

VR = 3 V DC, F = 1 MHz 9.2 11.5 13.8 pF

Cut-off frequency (Z

source

= Z

= 50 Ω) 280 MHz

load

2/7 Doc ID 14730 Rev 2

80 100 120 Ω

EMIF06-1002F2 Electrical characteristics

Figure 3. S21 attenuation measurements Figure 4. Analog crosstalk measurements

dB

0.00

-5.00

-10.00

-15.00

-20.00

-25.00

-30.00

-35.00

-40.00

100.0k 1.0M 10.0M 100.0M 1.0G

I1 - O1 I2 - O2
I3 - O3 I4 - O4
I5 - O5 I6 - O6

F (Hz)

Figure 5. ESD response to IEC61000-4-2

(+ 15 kV air discharge) on one input
(V

) and one output (V

in

out

)

Figure 6. ESD response to IEC61000-4-2

dB

0.00

-10.00

-20.00

-30.00

-40.00

-50.00

-60.00

-70.00

-80.00

-90.00

-100.00

-110.00

-120.00

-130.00

-140.00

100.0k 1.0M 10.0M 100.0M 1.0G

I1 - O2 I1 - O6

(- 15 kV air discharge) on one input
(Vin) and one output (V

F (Hz)

out

)

Figure 7. Line capacitance versus applied voltage for filter

C(pF)

18

16

14

12

10

8

6

4

2

0

0123 45

Doc ID 14730 Rev 2 3/7

V (V)

LINE

F=1MHz

V

osc

=30mV

Tj=25°C

RMS