ST EMIF04-1005M8 User Manual

EMIF04-1005M8

4-line IPAD™ low capacitance EMI filter and ESD protection in micro QFN package

Features

EMI symmetrical (I/O) low-pass filter

High efficiency in EMI filtering: -34 dB at frequencies from 900 MHz to 1.8 GHz

Very low PCB space consumption: 1.7 mm x 1.5 mm

Very thin package: 0.6 mm max

High efficiency in ESD suppression on input pins (IEC 61000-4-2 level 4)

High reliability offered by monolithic integration

High reduction of parasitic elements through integration and wafer level packaging

Lead-free package

Complies with following standards:

IEC 61000-4-2 level 4 input pins

15 kV (air discharge)

8 kV (contact discharge)

MIL STD 883G - Method 3015-7 Class 3B (all pins)

Applications

Where EMI filtering in ESD sensitive equipment is required:

LCD and camera for mobile phones

Computers and printers

Communication systems

MCU boards

Description

The EMIF04-1005M8 is a 4-line highly integrated device designed to suppress EMI/RFI noise in all systems exposed to electromagnetic interference.

This filter includes an ESD protection circuitry, which prevents damage to the application when subjected to ESD surges up to 15 kV on the input pins.

8

1

7GND 2

GND

6

3

5

4

Micro QFN 1.7 mm x 1.5 mm (bottom view)

Figure 1. Pin configuration (top view)

1 Input

Output 8

2 Input

Output 7

3 Input

Output 6

4 Input

Output 5

 

Figure 2. Basic cell configuration

100 Ω

Input Output

Typical line capacitance = 45 pF @ 0 V

TM: IPAD is a trademark of STMicroelectronics

January 2009

Rev 5

1/10

www.st.com

ST EMIF04-1005M8 User Manual

Characteristics

EMIF04-1005M8

 

 

1 Characteristics

Table 1.

Absolute ratings (limiting values at Tamb = 25 °C unless otherwise specified)

Symbol

 

 

 

 

Parameter

 

 

 

 

Value

Unit

VPP

ESD IEC 61000-4-2, air discharge

 

 

 

 

15

 

kV

ESD IEC 61000-4-2, contact discharge

 

 

 

 

15

 

Tj

Junction temperature

 

 

 

 

 

 

125

°C

Top

Operating temperature range

 

 

 

 

-40 to + 85

°C

Tstg

Storage temperature range

 

 

 

 

-55 to +150

°C

Table 2.

Electrical characteristics (Tamb = 25 °C)

 

 

 

 

 

 

Symbol

 

 

Parameter

 

 

 

 

I

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VBR

Breakdown voltage

 

 

 

 

 

IF

 

 

 

IRM

Leakage current @ VRM

 

 

 

 

 

 

 

 

VRM

Stand-off voltage

 

 

 

VBR

 

 

 

 

 

VCL

Clamping voltage

 

 

 

 

VF

 

 

 

 

 

 

VCL

VRM

 

 

 

 

 

 

IRM

 

 

V

Rd

Dynamic resistance

 

 

 

 

 

 

 

 

 

 

 

 

 

IR

 

 

 

IPP

Peak pulse current

 

 

 

 

 

 

 

 

 

RI/O

Series resistance between Input & Output

 

 

 

IPP

 

 

 

Cline

Input capacitance per line

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

 

 

 

Test conditions

 

 

Min.

Typ.

 

Max.

Unit

VBR

IR = 1 mA

 

 

 

 

6

8

 

10

V

VF

IF = 10 mA

 

 

 

 

0.5

1.0

 

1.5

V

IRM

VRM = 3 V per line

 

 

 

 

 

 

200

nA

RI/O

Tolerance ± 10%

 

 

 

90

100

 

110

Ω

Cline

VLINE = 0 V dc, VOSC = 30 mV, F = 1 MHz

 

38

45

 

52

pF

Figure 3.

S21 attenuation measurement

Figure 4. Analog cross talk measurements

 

dB

 

 

 

 

 

dB

 

 

 

 

 

0.00

 

 

 

 

 

 

0.00

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

-20.00

 

 

 

 

 

-10.00

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

-40.00

 

 

 

 

 

-20.00

 

 

 

 

 

 

-60.00

 

 

 

 

 

 

 

 

 

 

 

 

-80.00

 

 

 

 

 

-30.00

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

-100.00

 

 

 

 

 

 

 

 

F (Hz)

 

 

 

 

 

F (Hz)

 

 

-40.00

 

 

 

 

 

 

-120.00

 

 

 

100.0k

1.0M

10.0M

100.0M

1.0G

 

 

 

 

 

 

 

 

100.0k

1.0M

10.0M

100.0M

1.0G

2/10

EMIF04-1005M8

Ordering information scheme

 

 

Figure 5. ESD response to IEC 61000-4-2

Figure 6. ESD response to IEC 61000-4-2

(+15 kV air discharge) on one input

(- 15 kV air discharge) on one input

(Vin) and on one output (Vout)

(Vin) and on one output (Vout)

 

 

Figure 7. Line capacitance versus reverse voltage applied (typical value)

50.00CLINE (pF)

 

 

 

 

 

45.00

 

 

 

 

 

40.00

 

 

 

 

 

35.00

 

 

 

 

 

30.00

 

 

 

 

 

25.00

 

 

 

 

 

20.00

 

 

 

 

 

15.00

 

 

 

 

 

10.00

 

 

 

 

 

5.00

 

 

VLINE (V)

 

 

0.00

 

 

 

 

 

0

1

2

3

4

5

2 Ordering information scheme

Figure 8. Ordering information scheme

EMIF yy - xxx z Mx

EMI Filter

Number of lines

Information

x = resistance value (Ohms) z = capacitance value / 10(pF)

Package

Mx = Micro QFN x leads

3/10

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