EMIF03-SIM04F3
3-line IPAD™, EMI filter including ESD protection
Features
■EMI symmetrical (I/O) low-pass filter
■high efficiency in EMI/ESD protection
■lead-free package
■very thin package
■high reliability offered by monolithic integration
■high reduction of parasitic elements through integration and wafer level packaging
Complies with the following standards
■IEC 61000-4-2 level 4:
–± 15 kV (air discharge)
–± 8 kV (contact discharge)
■IEC 61000-4-2 level 1:
–± 2 kV (air discharge)
–± 2 kV (contact discharge)
Applications
Where EMI filtering in ESD sensitive equipment is required:
■mobile phones and communication systems
■computers, printers and MCU Boards
Description
The EMIF03-SIM04F3 Flip Chip is a low capacitance EMI filter designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interference.
This filter includes ESD protection circuitry, which prevents damage to the protected device when subjected to ESD surges up to 15 kV.
Lead-free Flip-Chip package (11 bumps)
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1 |
2 |
3 |
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A |
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B |
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C |
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D |
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Figure 2. |
Configuration |
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D1 |
D2 |
D3 |
A1 |
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100 Ω |
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A3 |
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R1 |
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B1 |
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47 Ω |
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B3 |
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R2 |
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C1 |
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100 Ω |
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C3 |
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R3 |
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A2 |
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C2 |
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GND |
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GND |
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A2 and C2 bumps must be connected together on the PCB |
TM: IPAD is a trademark of STMicroelectronics.
October 2010 |
Doc ID 17053 Rev 2 |
1/7 |
www.st.com
Electrical characteristics |
EMIF03-SIM04F3 |
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Table 1. |
Absolute maximum ratings (Tamb = 25 °C) |
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Symbol |
Parameter |
Value |
Unit |
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Internal pins (A1, B1, C1): |
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ESD discharge IEC 61000-4-2, level 1, air discharge |
±2 |
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VPP |
ESD discharge IEC 61000-4-2, level 1, contact discharge |
±2 |
kV |
External pins (A3, B3, C3, D1, D2 and D3): |
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ESD discharge IEC 61000-4-2, level 4, air discharge |
±15 |
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ESD discharge IEC 61000-4-2, level 4, contact discharge |
±15 |
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Pd |
Line resistance power dissipation at 70 °C |
60 |
mW |
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Top |
Operating temperature range |
- 40 to + 85 |
°C |
Tstg |
Storage temperature range |
- 55 to 150 |
°C |
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Parameter |
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VBR |
= |
Breakdown voltage |
IRM |
= |
Leakage current @ VRM |
RI/O |
= |
Series resistance |
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between input and output |
Cline |
= |
Line capacitance |
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I |
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IR |
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VBR VRM |
IRM |
V |
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IRM |
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VRM VBR |
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IR |
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Table 2. |
Electrical characteristics (Tamb = 25 °C) |
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Symbol |
Test conditions |
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Min. |
Typ. |
Max. |
Unit |
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VBR |
IR = 1 mA |
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6 |
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V |
IRM |
VRM = 3 V per line |
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50 |
200 |
nA |
R1, R3 |
Tolerance ± 20% |
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80 |
100 |
120 |
Ω |
R2 |
Tolerance ± 20% |
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37.6 |
47 |
56.4 |
Ω |
Cline |
Vline = 0 V, Vosc = 30 mV, F = 1 MHz |
(1) |
8 |
10 |
12 |
pF |
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(measured under zero light conditions) |
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1. A2 and C2 bumps must be connected together on the printed circuit board
2/7 |
Doc ID 17053 Rev 2 |
EMIF03-SIM04F3 |
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Electrical characteristics |
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Figure 4. S21 (dB) attenuation measurement |
Figure 5. S21 (dB) analog crosstalk |
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B3 - B1 |
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measurements C3 - A1 |
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0.00 S21 (dB) |
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0.00 S21 (dB) |
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-10.00 |
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-20.00 |
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-20.00 |
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-40.00 |
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-30.00 |
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-60.00 |
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-40.00 |
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-80.00 |
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-50.00 |
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F (Hz) |
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-100.00 |
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F (Hz) |
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100.0k |
1.0M |
10.0M |
100.0M |
1.0G |
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100.0k |
1.0M |
10.0M |
100.0M |
1.0G |
Figure 6. ESD response to IEC 61000-4-2 |
Figure 7. ESD response to IEC 61000-4-2 |
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(+15 kV air discharge) on one line |
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(-15 kV air discharge) on one line |
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20 V/Div |
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100 ns/dIV |
C2 |
10 V/Div |
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IN |
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IN |
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C2 |
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100 ns/Div |
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10 V/Div |
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C3 |
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OUT |
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OUT |
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C3 |
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100 ns/dIV |
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10 V/Div |
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100 ns/Div |
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1 V/Div
IN
C2
20 ns/Div
500 mV/Div OUT
C3
20 ns/Div
Doc ID 17053 Rev 2 |
3/7 |