ST EMIF02-USB05F2 User Manual

IPAD™
2 line EMF filter including ESD protection
Main application
When EMI filtering is ESD sensitive equipment is required:
Computers, printers and MCU boards
Description
The EMIF02-USB05F2 is a highly integrated array designed to suppress EMI / RFI noise for USB port filtering. The EMIF02-USB05F2 Flip-Chip packaging means the package size is equal to the die size.
Additionally, this low-pass filter includes an ESD protection circuitry to prevent damage to the application when subjected to ESD surges up to 15 kV.
This device is designed to be fully compatible with USB standards.
EMIF02-USB05F2
Flip-Chip
(8 Bumps)
Pin configuration (bump side)
12
V
IO4
CC
A
O2 I2
O1 I1
IO3
GND
B
C
D
Benefits
2 x EMI low-pass filter + 2 line ESD protection
1.5 kΩ pull-up included
High efficiency in EMI filtering
Lead free package
Very low PCB space consumption:
1.92 mm x 0.92 mm
Very thin package: 0.65 mm
High reliability offered by monolithic integration
High reduction of parasitic elements through
integration and wafer level packaging
USB full speed (12 Mbps), OTG compliant
Complies with following standards:
IEC 61000-4-2
level 4
MIL STD 883G - Method 3015-7 Class 3
November 2006 Rev 2 1/7
15 kV (air discharge) 8 kV (contact discharge)
Functional diagram
IO4
IO3
Input 2
GND
Input 1
V
CC
R3
R1
Output2
R2
Output 1
Order code
Part Number Marking
EMIF02-USB05F2 GV
TM: IPAD is a trademark of STMicroelectronics
www.st.com
7
Characteristics EMIF02-USB05F2

1 Characteristics

Table 1. Absolute ratings (limiting values)

Symbol Parameter and test conditions Value Unit
Maximum junction temperature 125 ° C
T
j
T
T
Table 2. Electrical characteristics (Tamb = 25° C)
Operating temperature range - 40 to + 85 ° C
op
Storage temperature range - 55 to + 150 ° C
stg
Symbol Parameter
V
I
RM
V
C
Breakdown voltage
BR
Leakage current @ V
Stand-off voltage
RM
Input capacitance per line
line
RM
BR
I
I
R
I
RM
VRMV
I
RM
V
I
R
BRVRM
Symbol Test conditions Tolerance Min. Typ. Max. Unit
V
BR
I
RM
R
, R
1
2
R
3
C
line
IR = 1 mA 6 9 V
VRM = 5 V per line 1 µA
I = 10 mA ± 5% 33 Ω
I = 1 mA ± 5% 1.5 kΩ
@ 0 V 30 pF
Matching Serial resistance matching 1 %
V
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EMIF02-USB05F2 Characteristics
Figure 1. S21 (dB) attenuation measurement Figure 2. Analog crosstalk measurements
dB
0.00
-10.00
-
-
-
-20.00
-
-
-
-30.00
-
-
-
-40.00
-
-
-
100.0k 1.0M 10.0M 100.0M 1.0G
F (Hz)
Figure 3. ESD response to IEC 61000-4-2
(+15 kV air discharge) on one input (Vin) and on one output (Vout)
V(in) 5V/d
Figure 4. ESD response to IEC 61000-4-2
V(in) 5V/d
dB
0.00
-10.00
-
-20.00
-
-30.00
-
-40.00
-
-50.00
-
-60.00
-
-70.00
-80.00
-90.00
-100.00
-
100.0k 1.0M 10.0M 100.0M 1.0G
F (Hz)
(-15 kV air discharge) on one input (Vin) and on one output (Vout)
V(out) 5V/d
100 ns/d
Figure 5. Junction capacitance versus
reverse voltage applied
C (pF)
LINE
35
Vosc=30mV
30
25
20
15
10
5
0
0123 45
V (V)
LINE
Vosc = 30 mV F=1MHz
F = 1 MHz
Tamb = 25
Ta=25°C
V(out) 5V/d
100 ns/d
°C
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Ordering information scheme EMIF02-USB05F2

Figure 6. Aplac model device structure

Lbump
Rbump
A1
A2
D2
bulk
Rbump
B1
C1
Lbump
=D1
MODEL
bulk
Rbump Rbump
Lbump Lbump
=D1
MODEL MODEL
R2
bulk
R1
MODEL
bulk
bulk
R3
=D1
Lbump
MODEL
bulk
=D1

Figure 7. Aplac model parameters

aplacvar R1 33 aplacvar R2 33 aplacvar R3 1.5k aplacvar Cz_D1 15pF aplacvar Rs_D1 1 aplacvar Cz_D2 300pF aplacvar Rs_D2 0.3 aplacvar Lgnd 100pH aplacvar Rgnd 100m aplacvar Cgnd 0.4pF aplacvar Lbump 50pH aplacvar Rbump 20m
Rbump
=D1
B2
Rbump Rbump
Lbump Lbump
=D1
MODEL MODEL
C2
Diode D1 BV=7 IBV=1m CJO=Cz_d1 M=0.3333 RS=Rs_d1 VJ=0.6 TT=100n
bulk bulk
Diode D2 BV=7 IBV=1m CJO=Cz_d2 M=0.3333 RS=Rs_d2 VJ=0.6 TT=100n
=D1
Cgnd
MODEL
D1
Lbump
Rbump
Lgnd
Rgn d
=D2

2 Ordering information scheme

EMIF yy - xxx zz Fx
EMI Filter
Number of lines
Information
3 letters = application 2 digits = version
Package
F = Flip-Chip x = 2: Leadfree Pitch = 500 µm, Bump = 315 µm
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EMIF02-USB05F2 Package information

3 Package information

Figure 8. Flip-Chip package dimensions

500 µm ± 10
500 µm ± 10
0.92 mm ± 50 µm
315 µm ± 50
1.92 mm ± 50 µm
650 µm ± 65

Figure 9. Foot print recomendations Figure 10. Marking

Dot, ST logo xx = marking z = manufacturing location
Copper pad Diameter:
250 µm recommended, 300 µm max
Solder stencil opening: 330 µm
Solder mask opening recommendation:
340 µm min for 315 µm copper pad diameter
yww = datecode
(y = year
ww = week)
E
xyxwz
w

Figure 11. Flip-Chip tape and reel specification

Dot identifying Pin A1 location
4 +/- 0.1
8 +/- 0.3
ST
0.73 +/- 0.05
All dimensions in mm
yww
xxx
E
5/7
yww
xxx
User direction of unreeling
ST
E
4 +/- 0.1
Ø 1.5 +/- 0.1
ST
yww
xxx
E
1.75 +/- 0.1 3.5 +/- 0.1
Ordering information EMIF02-USB05F2
Note: More packing information is available in the application notes
AN1235: “Flip-Chip: Package description and recommendations for use”
AN1751: “EMI Filters: Recommendations and measurements”
In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.

4 Ordering information

Ordering code Marking Package Weight Base qty Delivery mode
EMIF02-USB05F2 GV Flip-Chip 2.7 mg 5000 Tape and reel 7”

5 Revision history

Date Revision Changes
14-Mar-2005 1 Initial release.
13-Nov-2006 2
Reformatted to current standards. Modified functional diagram on page 1 to show connections. Updated Aplac model information.
6/7
EMIF02-USB05F2
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