3-line IPAD™, EMI filter including ESD protection
Features
■ EMI symmetrical (I/O) low-pass filter
■ high efficiency in EMI/ESD protection
■ lead-free package
■ very thin package
■ high reliability offered by monolithic integration
■ high reduction of parasitic elements through
integration and wafer level packaging
Complies with the following standards
EMIF02-USB04F3
Lead-free Flip-Chip package
(9 bumps)
■ IEC 61000-4-2 level 4 (on external pins B1 and
C1):
– ±15 kV (air discharge)
– ±8 kV (contact discharge)
■ IEC 61000-4-2 level 1 (on internal pins):
– ±2 kV (air discharge)
– ±2 kV (contact discharge)
Applications
Where EMI filtering in ESD sensitive equipment is
required:
■ mobile phones and communication systems
■ computers, printers and MCU boards
Description
The EMIF02-USB04F3 chip is a highly integrated
audio filter device designed to suppress EMI/RFI
noise in all systems subjected to electromagnetic
interference.
This filter includes ESD protection circuitry, which
prevents damage to the protected device when
subjected to ESD surges up to 15 kV.
Figure 1. Pin configuration (bump side)
3 2 1
3 2 1
A
A
B
C
Figure 2. Configuration
A2
C2 B3
R4 R3
R5
C1
B1
A1
C = 20 pF max
line
R2
R1
C3
A3
B2
TM: IPAD is a trademark of STMicroelectronics.
October 2010 Doc ID 18144 Rev 1 1/7
www.st.com
7
Electrical characteristics EMIF02-USB04F3
1 Electrical characteristics
Table 1. Absolute maximum ratings (T
Symbol Parameter Value Unit
Internal pins (A2, A3, B2, B3, C2, C3):
ESD discharge IEC 61000-4-2, level 1, air discharge
V
PP
P
d
T
op
ESD discharge IEC 61000-4-2, level 1, contact discharge
External pins (A1, B1, C1):
ESD discharge IEC 61000-4-2, level 4, air discharge
ESD discharge IEC 61000-4-2, level 4, contact discharge
Line resistance power dissipation at 70 °C 60 mW
Operating temperature range - 40 to + 85 °C
amb
= 25 °C)
±2
±2
±15
±8
kV
T
Storage temperature range - 55 to 150 °C
stg
Figure 3. Electrical characteristics (definitions)
I
I
Symbol Parameter
V = Breakdown voltage
BR
I = Leakage current @ V
RM RM
C = Line capacitance
line
R Series resistance between Input and Output
Table 2. Electrical characteristics (T
=
I/O
amb
= 25 °C)
VBRV
VBRV
Symbol Test conditions Min. Typ. Max. Unit
V
BRIR
I
RM
R
1, R2
R
4, R5
R
3
C
line
= 1 mA 7 V
VRM = 3 V per line 100 nA
Tolerance ± 5% 33 Ω
Tolerance ± 20% 18.5 kΩ
1425 1490 1560 Ω
V
line
= 0 V, V
= 30 mV, F = 1 MHz
osc
(measured under zero light conditions)
I
I
I
R
R
R
RM
I
RM
I
I
RM
RM
RM
I
I
RM
RM
VRMV
VRMV
I
I
R
R
V
V
BR
BR
20 pF
2/7 Doc ID 18144 Rev 1
EMIF02-USB04F3 Electrical characteristics
Figure 4. S21 (dB) attenuation measurement
on C3-C1 and A3-B1
dB
0.00
- 10.00
D+
D -
- 20.00
- 30.00
- 40.00
- 50.00
- 60.00
F = 335 MHz
C
S21(dB)
S21(dB)
F = 900 Mhz
-12.3
-12.0
F = 1.8 Ghz
-20.4
-19.5
f/Hz
D+
D+
D-
D-
1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G
V= 0V
BIAS
Figure 6. Digital crosstalk measurement on
C3-B1 in 50 environment
D-OUT
C2
C1
1 V/Div.
100 mV/Div.
D+IN
10 ns/Div.
10 ns/Div.
Figure 5. Analog crosstalk measurements on
C3 - A1
XTalk
0.00
- 10.00
- 20.00
- 30.00
- 40.00
- 50.00
- 60.00
(dB)
V= 0V
BIAS
D+/D-
XTalk(dB)
300 kHz < F < 3 GHz
1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G
>-12
f/Hz
Figure 7. ESD response to IEC 61000-4-2
(+15 kV air discharge) on one input
V
and on one output V
(in)
20 V/Div.
INPUT
C2
10 V/Div.
OUTPUT
C3
(out)
100 ns/Div
100 ns/Div
Figure 8. ESD response to IEC 61000-4-2
(-15 kV air discharge) on one input
V
and on one output V
(in)
20 V/Div.
C2
10 V/Div.
C3
INPUT
OUTPUT
Figure 9. Line capacitance versus applied
voltage (typical values, line C1-B2)
(out)
C (pF)
18
16
14
12
100 ns/Div
100 ns/Div
Doc ID 18144 Rev 1 3/7
10
8
6
4
2
0
0123456
V (V)
R
Ordering information scheme EMIF02-USB04F3
2 Ordering information scheme
Figure 10. Ordering information scheme
EMIF yy - xxx zz Fx
EMI filter
Number of lines
Information
x = resistance value (Ohms)
z = capacitance value / 10(pF)
or
3 letters = application
2 digits = version
Package
F = Flip Chip
x = 3: lead-free, pitch = 400 µm
4/7 Doc ID 18144 Rev 1
EMIF02-USB04F3 Package information
1.14 mm ± 30 µm
1.14 mm ± 30 µm
255 µm ± 40
400 µm ± 40
400 µm ± 40
170 µm ± 10
170 µm ± 10
ST
ST
ST
xxz
yww
xxz
yww
xxz
yww
ST
ST
ST
xxz
yww
xxz
yww
xxz
yww
3 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK®
®
is an ST trademark.
.
Figure 11. Package dimensions
500 µm ± 50
Figure 12. Footprint Figure 13. Marking
Copper pad Diameter:
220 µm recommended
260 µm maximum
Solder mask opening:
300 µm minimum
Solder stencil opening:
220 µm recommended
Dot, ST logo
xx = marking
z = manufacturing location
yww = datecode
(y = year
ww = week)
ECOPAK grade
xyxwz
w
Figure 14. Flip Chip tape and reel specification
Dot identifying Pin A1 location
8.0 ± 0.3
0.69 ± 0.05
All dimensions in mm
2.0 ± 0.05
yww
yww
xxz
xxz
1.24
1.24
User direction of unreeling
Doc ID 18144 Rev 1 5/7
4.0 ± 0.1
yww
yww
xxz
xxz
4.0 ± 0.1
Ø 1.5 ± 0.1
yww
yww
xxz
xxz
1.75 ± 0.1
3.5 ±- 0.1
Ordering information EMIF02-USB04F3
4 Ordering information
Table 3. Ordering information
Order code Marking Package Weight Base qty Delivery mode
EMIF02-USB04F3 JM Flip Chip 1.4 mg 5000 Tape and reel (7")
Note: More information is available in the application notes:
AN2348: “STMicroelectronics 400 micro-metre Flip Chip: package description and
recommendation for use”
AN1751: "EMI filters: recommendations and measurements"
5 Revision history
Table 4. Document revision history
Date Revision Changes
21-Oct-2010 1 First issue.
6/7 Doc ID 18144 Rev 1
EMIF02-USB04F3
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Doc ID 18144 Rev 1 7/7
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