2-line IPAD™, EMI filter and ESD protection
Features
■ EMI symmetrical (I/O) low-pass filter
■ High efficiency in EMI filtering
■ Very low PCB space consuming:
1.07 mm x 1.47 mm
■ Very thin package: 0.65 mm
■ High efficiency in ESD suppression
■ High reliability offered by monolithic integration
■ High reducing of parasitic elements through
integration and wafer level packaging
Complies with the following standards:
■ IEC 61000-4-2 level 4, on output pins:
– 15 kV (air discharge)
– 8 kV (contact discharge)
■ IEC 61000-4-2 Level 1, on input pins:
– 2 kV (air discharge)
– 2 kV (contact discharge)
■ MIL STD 883E - Method 3015-6 Class 3
EMIF02-SPK01F2
Flip-Chip package
(5 bumps)
Figure 1. Pin configuration (bump side)
132
I1
I2
GND
O2 O1
Figure 2. Basic cell configuration
A
B
C
Low-pass Filter
Applications
Where EMI filtering in ESD sensitive equipment is
required:
■ Mobile phones and communication systems
■ Computers, printers and MCU Boards
Input
GND GND GND
Output
Ri/o = 10
Cline = 200 pF
Ω
Description
The EMIF02-SPK01 is a highly integrated device
designed to suppress EMI/RFI noise in all
systems subjected to electromagnetic
interferences. The EMIF02 Flip-Chip packaging
means the package size is equal to the die size.
This filter includes an ESD protection circuitry
which prevents damage to the application when
subjected to ESD surges up 15 kV.
TM: IPAD is a trademark of STMicroelectronics.
September 2011 Doc ID 11740 Rev 2 1/7
www.st.com
7
Electrical characteristics EMIF02-SPK01F2
V
I
PP
V
CL
V
BR
V
RM
I
R
I
RM
I
RM
I
R
I
PP
V
RM
V
BR
V
CL
1 Electrical characteristics
Table 1. Absolute maximum ratings (T
Symbol Parameter Value Unit
T
Maximum junction temperature 125 °C
j
Operating temperature range -40 to +85 °C
T
op
T
Storage temperature range -55 to +150 °C
stg
Figure 3. Electrical characteristics (definitions)
Symbol Parameter
V = Breakdown voltage
BR
I = Leakage current @ V
RM RM
V = Stand-off voltage
RM
V = Clamping voltage
CL
R = Dynamic impedance
D
I = Peak pulse current
PP
I = Breakdown current
R
V = Forward voltage drop
F
C = Line capacitance
line
amb
= 25 °C)
V
V
CL
BR
I
I
PP
I
R
I
V
RM
RM
I
V
RM
I
R
I
PP
V
V
CL
BR
RM
Table 2. Electrical characteristics (Tamb = 25 °C)
Symbol Test condition Min. Typ. Max. Unit
V
BRIR
I
RM
R
I/O
C
line
= 1 mA 6 8 V
VRM = 3 V per line 500 nA
Tolerance ± 20% 10 Ω
VR = 0 V 200 pF
2/7 Doc ID 11740 Rev 2
EMIF02-SPK01F2 Electrical characteristics
Figure 4. S21 (dB) attenuation measurements
and Aplac simulation
0.00
dB
-
-5.00
-
-10.00
-
-15.00
-
-20.00
-
-25.00
-
-30.00
-35.00
-40.00
100.0k 1.0M 10.0M 100.0M 1.0G
1.0M
f/Hz
Figure 6. ESD response to IEC 61000-4-2
(+15kV air discharge) on one input
V
and one output V
(in)
(out)
Figure 5. Analog crosstalk measurements
0.00
dB
-10.00
-
-20.00
-
-30.00
-
-40.00
-
-50.00
-
-60.00
-
100.0k 1.0M 10.0M 100.0M 1.0G
f/Hz
Figure 7. ESD response to IEC 61000-4-2
(–15kV air discharge) on one input
V
and one output V
(in)
(out)
Figure 8. Line capacitance versus applied voltage
C(pF)
250
200
150
100
50
0
012345
Doc ID 11740 Rev 2 3/7
V (V)R
V
F=1MHz
osc
Tj=25°C
=30mV
RMS
Electrical characteristics EMIF02-SPK01F2
Figure 9. Aplac mode
Rbump Lbump Lbump Rbump
IN1
model = D1 model = D2
model = D1
IN2 OUT2
Rbump Lbump Lbump RbumpRspk Lspk
Rspk Lspk
EMIF02-SPK01F1 model
Figure 10. Aplac parameters
Model D1
CJO=Cdiode1
BV=7
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.7
VJ=0.6
TT=50n
Model D3
CJO=Cdiode3
BV=7
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.12
VJ=0.6
TT=50n
model = D3
model = D2
Model D2
CJO=Cdiode2
BV=7
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.3
VJ=0.6
TT=50n
OUT1
GND
GND
Cgnd
Ground return
aplacvar Ls 1nH
aplacvar Rs 150m
aplacvar Rspk 10
aplacvar Lspk 10p
aplacvar Cdiode1 234pF
aplacvar Cdiode2 3.5ppF
aplacvar Cdiode3 1nF
aplacvar Lbump 50pH
aplacvar Rbump 10m
aplacvar Rsub 0.5m
aplacvar Lsub 10pH
aplacvar Rgnd 1m
aplacvar Lgnd 50pH
aplacvar Cgnd 0.15pF
Lsub
Rsub
Rbump
Lbump
Lgnd
Rgnd
4/7 Doc ID 11740 Rev 2
EMIF02-SPK01F2 Ordering information
2 Ordering information
Figure 11. Ordering information scheme
EMIF yy - xxx zz Fx
EMI Filter
Number of lines
Information
x = resistance value (Ohms)
z = capacitance value / 10(pF)
or
3 letters = application
2 digits = version
Packag e
F = Flip-Chip
x = 1: 500µm, Bump = 315µm
= 2: Leadfree Pitch = 500µm, Bump = 315µm
3 Packaging information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK®
®
is an ST trademark.
.
Figure 12. Flip-Chip dimensions
500 µm ± 10
250 µm ± 10
435 µm
500 µm ± 15
1.07 mm ± 50µm
315 µm ± 50
1.47 mm ± 50µm
650 µm ± 50
Figure 13. Footprint Figure 14. Marking
Dot, ST logo
Copper pad Diameter :
250 µm recommended, 300 µm max
Solder stencil opening: 330µm
Solder mask opening recommendation:
340 µm min for 315 µm copper pad diameter
xx = marking
z = manufacturing location
yww = datecode
(y = year ww = week)
E
xyxwz
w
Doc ID 11740 Rev 2 5/7
Ordering information EMIF02-SPK01F2
Figure 15. Packing
Dot identifying Pin A1 location
4 ± 0.1
Ø 1.5 ± 0.1
1.75 ± 0.1
E E E
0.73 ± 0.05
All dimensions in mm
8 ± 0.3
ST
yww
xxz
ST
xxz
yww
4 ± 0.1
User direction of unreeling
4 Ordering information
Table 3. Ordering information
Order code Marking Package Weight Base qty Delivery mode
EMIF02-SPK01F2 FX Flip Chip 2.1 mg 5000 Tape and reel (7”)
Note: More packing information is available in the applications note:
AN1235: “Flip-Chip: package description and recommendations for use”
AN 1751: “EMI filters: Recomendations and measurements”
ST
xxz
yww
3.5 ± 0.1
5 Revision history
Table 4. Document revision history
Date Revision Changes
14-Oct-2006 1 Initial release.
08-Sep-2011 2 Updated Figure 12 and Figure 13.
6/7 Doc ID 11740 Rev 2
EMIF02-SPK01F2
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Doc ID 11740 Rev 2 7/7
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