ST EMIF02-SPK01F2 User Manual

2-line IPAD™, EMI filter and ESD protection
Features
EMI symmetrical (I/O) low-pass filter
High efficiency in EMI filtering
Very low PCB space consuming:
Very thin package: 0.65 mm
High efficiency in ESD suppression
High reliability offered by monolithic integration
High reducing of parasitic elements through
integration and wafer level packaging
Complies with the following standards:
IEC 61000-4-2 level 4, on output pins:
– 15 kV (air discharge) – 8 kV (contact discharge)
IEC 61000-4-2 Level 1, on input pins:
– 2 kV (air discharge) – 2 kV (contact discharge)
MIL STD 883E - Method 3015-6 Class 3
EMIF02-SPK01F2
Flip-Chip package
(5 bumps)

Figure 1. Pin configuration (bump side)

132
I1
I2
GND
O2 O1

Figure 2. Basic cell configuration

A
B
C
Low-pass Filter
Applications
Where EMI filtering in ESD sensitive equipment is required:
Mobile phones and communication systems
Computers, printers and MCU Boards
Input
GND GND GND
Output
Ri/o = 10 Cline = 200 pF
Ω
Description
The EMIF02-SPK01 is a highly integrated device designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interferences. The EMIF02 Flip-Chip packaging means the package size is equal to the die size.
This filter includes an ESD protection circuitry which prevents damage to the application when subjected to ESD surges up 15 kV.
TM: IPAD is a trademark of STMicroelectronics.
September 2011 Doc ID 11740 Rev 2 1/7
www.st.com
7
Electrical characteristics EMIF02-SPK01F2
V
I
PP
V
CL
V
BR
V
RM
I
R
I
RM
I
RM
I
R
I
PP
V
RM
V
BR
V
CL

1 Electrical characteristics

Table 1. Absolute maximum ratings (T
Symbol Parameter Value Unit
T
Maximum junction temperature 125 °C
j
Operating temperature range -40 to +85 °C
T
op
T
Storage temperature range -55 to +150 °C
stg

Figure 3. Electrical characteristics (definitions)

Symbol Parameter
V = Breakdown voltage
BR
I = Leakage current @ V
RM RM
V = Stand-off voltage
RM
V = Clamping voltage
CL
R = Dynamic impedance
D
I = Peak pulse current
PP
I = Breakdown current
R
V = Forward voltage drop
F
C = Line capacitance
line
amb
= 25 °C)
V
V
CL
BR
I
I
PP
I
R
I
V
RM
RM
I
V
RM
I
R
I
PP
V
V
CL
BR
RM
Table 2. Electrical characteristics (Tamb = 25 °C)
Symbol Test condition Min. Typ. Max. Unit
V
BRIR
I
RM
R
I/O
C
line
= 1 mA 6 8 V
VRM = 3 V per line 500 nA
Tolerance ± 20% 10 Ω
VR = 0 V 200 pF
2/7 Doc ID 11740 Rev 2
EMIF02-SPK01F2 Electrical characteristics
Figure 4. S21 (dB) attenuation measurements
and Aplac simulation
0.00
dB
-
-5.00
-
-10.00
-
-15.00
-
-20.00
-
-25.00
-
-30.00
-35.00
-40.00
100.0k 1.0M 10.0M 100.0M 1.0G
1.0M f/Hz
Figure 6. ESD response to IEC 61000-4-2
(+15kV air discharge) on one input V
and one output V
(in)
(out)

Figure 5. Analog crosstalk measurements

0.00
dB
-10.00
-
-20.00
-
-30.00
-
-40.00
-
-50.00
-
-60.00
-
100.0k 1.0M 10.0M 100.0M 1.0G f/Hz
Figure 7. ESD response to IEC 61000-4-2
(–15kV air discharge) on one input V
and one output V
(in)
(out)

Figure 8. Line capacitance versus applied voltage

C(pF)
250
200
150
100
50
0
012345
Doc ID 11740 Rev 2 3/7
V (V)R
V
F=1MHz
osc
Tj=25°C
=30mV
RMS
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