ST EMIF02-MIC03M6 User Manual

2-line IPAD™, EMI filter and ESD protection for microphone
Features
EMI symmetrical (I/O) low-pass filter
High efficiency in EMI filtering
Very low PCB space consumption:
Very thin package: 0.6 mm max
High efficiency in ESD suppression
High reliability offered by monolithic integration
High reduction of parasitic elements through
integration and wafer level packaging
Lead-free and halogen-free package
Complies with following standards
IEC 61000-4-2 level 4, input and output pins
IEC 61000-4-2 level 4 requirements
– 8 kV (contact discharge)
or
– 15 kV (air discharge)
EMIF02-MIC03M6
Pin 1
Micro QFN 6 leads
1.45 mm x 1.00 mm (bottom view)

Figure 1. Pin configuration (top view)

MIC
GND GND
MIC
R in
L in
1
2
3
MIC
6
R out
5
MIC
4
L out
Application
Mobile phones
Description
The EMIF02-MIC03M6 is a 2-line highly integrated device designed to suppress EMI/RFI noise in all systems exposed to electromagnetic interference.
This filter includes ESD protection circuitry, which prevents damage to the application when subjected to ESD surges up to 8 kV on all pins.
May 2011 Doc ID 14448 Rev 2 1/11

Figure 2. Basic cell configuration

Low-pass filter
Input
GND GND GND
R = 68 , C
TM: IPAD is a trademark of STMicroelectronics
line
= 45 pF typ.Ω
Output
www.st.com
11
Characteristics EMIF02-MIC03M6

1 Characteristics

Table 1. Absolute ratings

(1)
Symbol Parameter Value Unit
V
T
T
1. limiting values at T
2. According to IEC61000-4-2 test conditions with ungrounded table top equipment set-up, PCB board on insulated plane (dimensions 25 x 25 mm
Table 2. Electrical characteristics (T
ESD discharge IEC61000-4-2 contact discharge
PP
ESD discharge IEC61000-4-2 air discharge
T
Junction temperature 125 °C
j
Operating temperature range -40 to + 85 °C
op
Storage temperature range -55 to +150 °C
stg
= 25 °C unless otherwise specified
amb
2
), 2 serial resistors of 470 kΩ to GND reference plane
amb
(2)
= 25 °C)
8
15
Symbol Parameter
I
I
PP
I
R
I
RM
VRMV
I
RM
I
R
I
PP
VBRV
RM
V
V
CL
BR
RM
RM
CL
PP
I/O
line
Breakdown voltage
Leakage current @ V
RM
Stand-off voltage
Clamping voltage
Dynamic resistance
d
Peak pulse current
Series resistance between Input & Output
Input capacitance per line
V
CL
BR
V
I
V
V
R
I
R
C
Symbol Test conditions Min. Typ. Max. Unit
BR
RM
I/O
IR = 1 mA 6 8 V
VRM = 3 V per line 500 nA
Tolerance ± 20% 68 Ω
(1)
VR = 0 V, F = 1 MHz, V
= 30 mV 45 pF
OSC
V
I
R
C
line
1. Tolerance ± 20%
kV
2/11 Doc ID 14448 Rev 2
EMIF02-MIC03M6 Characteristics
Figure 3. S21 attenuation measurement Figure 4. Analog cross talk measurements
(MIC R / MIC L)
dB
0.00
-5.00
-10.00
-15.00
-20.00
-25.00
-30.00
-35.00
-40.00
300.0k 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G
F (Hz)
Figure 5. ESD response to IEC 61000-4-2
(+8 kV contact discharge) on MIC lines
Input
vi = 20 V/d
Figure 6. ESD response to IEC 61000-4-2
dB
0.00
0.00
-10.00
-10.00
-20.00
-20.00
-30.00
-30.00
-40.00
-40.00
-50.00
-50.00
-60.00
-60.00
-70.00
-70.00
-80.00
-80.00
300.0k 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G
300.0k 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G Xtalk
L
R-L Xtalk L-R
F (Hz)
(-8 kV contact discharge) on MIC lines
Input
vi = 20 V/d
Output
vo = 10 V/d
20 ns/d
vo = 10 V/d
Output
20 ns/d
Doc ID 14448 Rev 2 3/11
Ordering information scheme EMIF02-MIC03M6

2 Ordering information scheme

Figure 7. Ordering information scheme

EMIF yy - xxx zz Mx
EMI Filter
Number of lines
Information
xxx = application zz = version
Package
Mx = Micro QFN x leads
4/11 Doc ID 14448 Rev 2
EMIF02-MIC03M6 Package information

3 Package information

Epoxy meets UL94, V0
Lead-free packages
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK specifications, grade definitions and product status are available at: www.st.com ECOPACK

Table 3. Micro QFN 1.45 x 1.00 6L dimensions

®
packages, depending on their level of environmental compliance. ECOPACK®
®
is an ST trademark.
D
N
112
A
A1
2
Dimensions
Ref.
E
Millimeters Inches
Min. Typ. Max. Min. Typ. Max.
A 0.50 0.55 0.60 0.020 0.022 0.024
A1 0.00 0.02 0.05 0.000 0.001 0.002
b 0.18 0.25 0.30 0.007 0.010 0.012
D 1.45 0.057
L
k
E 1.00 0.039
.
e 0.50 0.020
b
e
K 0.20 0.008
L 0.30 0.35 0.40 0.012 0.014 0.016
Figure 8. Footprint in mm [inches] Figure 9. Marking
0.50
[0.020]
0.25
[0.010]
0.60
[0.023]
0.30
[0.012]
Dot : Pi n 1 Identification
1.60
[0.063]
L
Doc ID 14448 Rev 2 5/11
Package information EMIF02-MIC03M6

Figure 10. Tape and reel specification

Dot identifying pin 1 location
8.0 +/- 0.3
8.0 +/- 0.3
1.65
2.0+/-0.05
2.0+/-0.05
4.00+/-0.1
4.00+/-0.1
φ 1.5 +/- 0.1
φ 1.5 +/- 0.1
1.75 +/- 0.1
1.75 +/- 0.1
3.5 +/- 0.03
3.5 +/- 0.03
LL L
0.75
0.75 1.20
User direction of unreeling
All dimensions in mm
User direction of unreeling
Note: Product marking may be rotated by 90° for assembly plant differentiation. In no case should
this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose.
4.00
4.00
6/11 Doc ID 14448 Rev 2
EMIF02-MIC03M6 Recommendation on PCB assembly

4 Recommendation on PCB assembly

4.1 Stencil opening design

1. General recommendation on stencil opening design
a) Stencil opening dimensions: L (Length), W (Width), T (Thickness).

Figure 11. Stencil opening dimensions

L
T
W
b) General design rule
Stencil thickness (T) = 75 ~ 125 µm
W
Aspect Ratio
Aspect Area
-----
1.5=
T
LW×
---------------------------­2T L W+()
0.66=
2. Reference design
a) Stencil opening thickness: 100 µm
b) Stencil opening for leads: Opening to footprint ratio is 90%.

Figure 12. Recommended stencil window position

7µm 7µm
15 µm
650 µm
620 µm
236 µm
15 µm
250 µm
Footprint
Stencil window
Footprint
Doc ID 14448 Rev 2 7/11
Recommendation on PCB assembly EMIF02-MIC03M6

4.2 Solder paste

1. Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
2. “No clean” solder paste is recommended.
3. Offers a high tack force to resist component movement during high speed.
4. Solder paste with fine particles: powder particle size is 20-45 µm.

4.3 Placement

1. Manual positioning is not recommended.
2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering.
3. Standard tolerance of ± 0.05 mm is recommended.
4. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages.
5. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool.
6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools.

4.4 PCB design preference

1. To control the solder paste amount, the closed via is recommended instead of open vias.
2. The position of tracks and open vias in the solder area should be well balanced. The symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away.
8/11 Doc ID 14448 Rev 2
EMIF02-MIC03M6 Recommendation on PCB assembly

4.5 Reflow profile

Figure 13. ST ECOPACK® recommended soldering reflow profile for PCB mounting

Temperature (°C)
Temperature (°C)
260°C max
260°C max
255°C
255°C
220°C
220°C
180°C
180°C
125 °C
125 °C
3°C/s max
3°C/s max
0
0
012345 67
012345 67
10-30 sec
10-30 sec
90 to 150 sec
90 to 150 sec
90 sec max
90 sec max
2°C/s recommended
2°C/s recommended
6°C/s max
6°C/s max
Time (min)
Time (min)
Note: Minimize air convection currents in the reflow oven to avoid component movement.
Doc ID 14448 Rev 2 9/11
Ordering information EMIF02-MIC03M6

5 Ordering information

Table 4. Ordering information
Order code Marking Package Weight Base qty Delivery mode
EMIF02-MIC03M6 L
1. The marking can be rotated by 90° to differentiate assembly location
(1)
Micro QFN 2.2 mg 3000 Tape and reel (7”)

6 Revision history

Table 5. Document revision history

Date Revision Changes
13-Feb-2008 1 Initial release
Updated ECOPACK statement. Updated n: IEC 61000-4-2 level 4
27-May-2011 2
requirements on page 1. Added note 2. on page 2 . Updated title Figure 5. and Figure 6. on page 3.
10/11 Doc ID 14448 Rev 2
EMIF02-MIC03M6
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Doc ID 14448 Rev 2 11/11
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