2-line IPAD™, EMI filter including ESD protection
Features
■ EMI symmetrical (I/O) low-pass filter
■ High efficiency EMI filtering
■ Lead-free package
■ Very low PCB space consumption: 0.9 mm
Very thin package: 0.60 mm
■
■ High efficiency ESD suppression
■ High reliability offered by monolithic integration
■ High reduction of parasitic elements through
integration and wafer level packaging
2
EMIF02-MIC02F3
Flip Chip
(6 bumps)
Figure 1. Pin layout (bump side)
Complies with the following standards
■ IEC61000-4-2 level 4 on external pins:
– 15 kV (air discharge)
– 8 kV (contact discharge)
■ IEC61000-4-2 level 1 on internal pins:
– 2 kV (air discharge)
– 2 kV (contact discharge)
Applications
Where EMI filtering in ESD sensitive equipment is
required:
■ Mobile phones and communication systems
■ Computers, printers and MCU Boards
Description
The EMIF02-MIC02F3 is a highly integrated
device designed to suppress EMI/RFI noise in all
systems subjected to electromagnetic
interference.
This filter includes ESD protection circuitry, which
prevents damage to the protected device when
subjected to ESD surges up 15 kV.
123
E2
GND
GND
I2
E1
A
B
I1
Figure 2. Basic cell configuration
Low-pass Filter
I1
I2
GND GND GND
E1
E2
R
= 470
Ω
i/o
C
= 16 pF
line
TM: IPAD is a trademark of STMicroelectronics.
April 2008 Rev 2 1/8
www.st.com
Characteristics EMIF02-MIC02F3
1 Characteristics
Table 1. Absolute ratings (limiting values)
Symbol Parameter Value Unit
External pins (A1, A3):
ESD discharge IEC61000-4-2, air discharge
V
PP
ESD discharge IEC61000-4-2, contact discharge
Internal pins (B1, B3):
ESD discharge IEC61000-4-2, air discharge
ESD discharge IEC61000-4-2, contact discharge
T
T
op
T
stg
Table 2. Electrical characteristics (T
Junction temperature 125 °C
j
Operating temperature range -40 to + 85 °C
Storage temperature range -55 to 150 °C
Symbol Parameters
V
BR
I
RM
V
RM
V
CL
R
I
PP
R
C
line
Breakdown voltage
Leakage current @ V
RM
Stand-off voltage
Clamping voltage
Dynamic impedance
d
Peak pulse current
Series resistance between Input & Output
I/O
Input capacitance per line
amb
= 25 °C)
VCL
VRMVBR
I
IR
IRM
15
8
kV
2
2
I
PP
IRM
IR
IPP
VBRVRM
VCL
V
Symbol Test conditions Min Typ Max Unit
V
BR
I
RM
R
I/O
C
line
IR = 1 mA 14 16 V
VRM = 12 V per line 200 nA
Tolerance ± 10 % 470 Ω
V
= 0V, V
line
= 30 mV, F = 1 MHz,
OSC
(measured under zero light conditions)
2/8
16 20 pF
EMIF02-MIC02F3 Characteristics
dB
(Line 1)
Line 1
f (Hz)
Figure 4. S21 (dB) attenuation measurement
(Line 2)
dB
0.00
-10.00
-20.00
-30.00
-40.00
-50.00
-60.00
100.0k 1.0M 10.0M 100.0M 1.0G
Line 2
f (Hz)
Figure 3. S21 (dB) attenuation measurement
0.00
-10.00
-20.00
-30.00
-40.00
-50.00
-60.00
100.0k 1.0M 10.0M 100.0M 1.0G
Figure 5. Analog crosstalk measurement Figure 6. Digital crosstalk measurement
dB
0.00
-10.00
-20.00
-30.00
-40.00
-50.00
-60.00
-70.00
-80.00
-90.00
-100.00
100.0k 1.0M 10.0M 100.0M 1.0G
Xtalk 1/2
f (Hz)
Output Line 2
10mV/d
Input Line 1
1V/d
10ns/d
5Gs/s
Figure 7. ESD response to IEC 61000-4-2
(+15 kV air discharge) on one input
and on one output
Input
20V/d
Output
10V/d
100ns/d
Figure 8. ESD response to IEC 61000-4-2
(-15 kV air discharge) on one input
and on one output
Input
20V/d
Output
10V/d
100ns/d
3/8
Application information EMIF02-MIC02F3
Figure 9. Line capacitance versus applied voltage
C
(pF)
LINE
18
16
14
12
10
8
6
4
2
0
0123456789101112
V (V)
LINE
2 Application information
Figure 10. Aplac model
E1 I1
Rbump Lbump
Rline
RbumpLbump
MODEL = D1
E2
Ls Rs
Port1 Port2
50
MODEL = D1 MODEL = D2
Lbump
Rbump
Rline
Rs LsE1 I1
Figure 11. Aplac parameters
Variables
aplacvar Rline 490
aplacvar C_d1 11p
aplacvar C_d2 5p
aplacvar C_d3 240p
aplacvar L 2pH
aplacvar Ls 950pH
aplacvar Rs 150m
aplacvar Lbump 50pH
aplacvar Rbump 20m
aplacvar Lgnd 80pH
aplacvar Rgnd 100m
Diode D1
BV=7
CJO=c_d1
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.85
VJ=0.6
TT=50n
MODEL = D2
MODEL = D3
I2
RbumpLbump
50
Diode D2
BV=7
CJO=c_d2
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.85
VJ=0.6
TT=50n
Lbump
Rbump
Lgnd
Rgnd
Diode D3
BV=7
CJO=c_d3
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.47
VJ=0.6
TT=50n
Lbump
Rbump
Lgnd
Rgnd
4/8
EMIF02-MIC02F3 Ordering information scheme
3 Ordering information scheme
Figure 12. Ordering information scheme
EMIF yy - xxx zz Fx
EMI Filter
Number of lines
Information
x = resistance value (Ohms)
z = capacitance value / 10(pF)
or
3 letters = application
2 digits = version
Package
F = Flip Chip
x = 3: Lead-free, pitch = 400 µm, bump = 255 µm
4 Package information
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a lead-free second level interconnect. The category of
second level interconnect is marked on the inner box label, in compliance with JEDEC
Standard JESD97. The maximum ratings related to soldering conditions are also marked on
the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at
www.st.com.
Figure 13. Package dimensions
400 µm ± 40
400 µm ± 40
185 µm ± 10
1.17 mm ± 30µm
605 µm ± 55
0.77 mm ± 30 µm
185 µm ± 10
255 µm ± 40
5/8
Ordering information EMIF02-MIC02F3
Figure 14. Footprint Figure 15. Marking
Copper pad Diameter:
220 µm recommended
260 µm maximum
Solder mask opening:
300 µm minimum
Solder stencil opening :
220 µm recommended
Dot, ST logo
xx = marking
z = manufacturing location
yww = datecode
Figure 16. Flip Chip tape and reel specifications
Dot identifying Pin A1 location
4 ± 0.1
0.87
8 ± 0.3
ST
yww
xxz
E
yww
(y = year
ww = week)
xxz
ST
E
1.27
Ø 1.5 ± 0.1
yww
xxz
E
xyxwz
w
1.75 ± 0.1 3.5 ± 0.1
ST
E
0.71 ± 0.05
All dimensions in mm
User direction of unreeling
Note: More information is available in the application notes:
AN2348: “STMicroelectronics 400 micro-metre Flip Chip: Package description and
recommendation for use”
AN1751: EMI Filters: Recommendations and measurements
5 Ordering information
Table 3. Ordering information
Order code Marking Package Base qty Delivery mode
EMIF02-MIC02F3 HB Flip Chip 5000 Tape and reel (7”)
4 ± 0.1
6/8
EMIF02-MIC02F3 Revision history
6 Revision history
Table 4. Document revision history
Date Revision Changes
17-Jan-2006 1 Initial release.
28-Apr-2008 2
Updated ECOPACK statement. Updated Figure 12, Figure 13 and
Figure 16. Reformatted to current standards.
7/8
EMIF02-MIC02F3
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