ST EMIF02-MIC02F2 User Manual

2-line IPAD™, EMI filter and ESD protection
Features
EMI symmetrical (I/O) low-pass filter
High efficiency in EMI filtering
Lead-free package
1.42 mm x 0.92 mm
Very thin package: 0.65 mm
High efficiency in ESD suppression
High reliability offered by monolithic integration
High reducing of parasitic elements through
integration and wafer level packaging
EMIF02-MIC02F2
Flip Chip
(6 bumps)

Figure 1. Pin configuration (bump side)

123
Complies with the following standards
IEC 61000-4-2 level 4 on input pins
– 15 kV (air discharge) – 8 kV (contact discharge)
IEC 61000-4-2 level 1 on input pins
– 2 kV (air discharge) – 2 kV (contact discharge)
Applications
Where EMI filtering in ESD sensitive equipment is required:
Mobile phones and communication systems
Computers, printers and MCU Boards
Description
The EMIF02-MIC02 is a highly integrated device designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interference. The EMIF02 Flip-Chip packaging means the package size is equal to the die size.
I2
O2
GND
GND
I1
O1

Figure 2. Basic cell configuration

Low-pass Filter
Input
GND GND GND
Output
A
B
Ri/o = 470 Cline = 16 pF
W
This filter includes an ESD protection circuitry which prevents damage to the application when subjected to ESD surges up 15 kV.
May 2011 Doc ID 10913 Rev 4 1/8
TM: IPAD is a trademark of STMicroelectronics.
www.st.com
8
Electrical characteristics EMIF02-MIC02F2

1 Electrical characteristics

Table 1. Absolute ratings (T
Symbol Parameter Value Unit
amb
= 25 °C)
T
T
T
Table 2. Electrical characteristics (T
Symbol Parameters
V
V
V
R
C
junction temperature 125 °C
j
Operating temperature range -40 to +85 °C
op
Storage temperature range -55 to 150 °C
stg
= 25 °C)
amb
I
I
R
I
BR
RM
RM
CL
PP
I/O
line
Breakdown voltage
Leakage current @ V
RM
Stand-off voltage
Clamping voltage
d
Dynamic impedance
VCL
Peak pulse current
Series resistance between input and output
Input capacitance per line
I
PP
IR IRM
VRMVBR
IRM IR
IPP
VBRVRM
Symbol Test conditions Min. Typ. Max. Unit
V
BR
I
RM
IR = 1 mA 14 16 V
VRM = 12 V per line 500 nA
VCL
V
R
I/O
C
line
@ 0 V 16 20 pF
2/8 Doc ID 10913 Rev 4
423 470 517 Ω
EMIF02-MIC02F2 Electrical characteristics
Figure 3. Attenuation measurement and

Figure 4. Analog crosstalk measurements

Aplac simulation
S21 (dB)
- 10.00
- 15.00
- 20.00
- 25.00
- 30.00
- 35.00
- 40.00
- 45.00
- 50.00
1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G
F (Hz)
Measurement
Simulation
dB
-20.00
-30.00
-
-40.00
-
-50.00
-
-60.00
-
-70.00
-
-80.00
-
1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G
I2/O1
F (Hz)
Figure 5. Digital crosstalk measurement Figure 6. ESD response to IEC61000-4-2
(-15 kV air discharge) on one input V(in) and on one output V(out)
Figure 7. ESD response to IEC61000-4-2
(+15 kV air discharge) on one input V(in) and on one output V(out)
Doc ID 10913 Rev 4 3/8
Figure 8. Line capacitance versus applied
voltage
C(pF)
20
18
16
14
12
10
8
6
4
2
V (V)R
0
0123456789101112
V
osc
F=1MHz
=30mV
Tj=25°C
RMS
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