The ECMF06-6AM16 is a highly integrated
common mode filter designed to suppress
EMI/RFI common mode noise on high speed
differential serial buses like MIPI D-PHY or MDDI.
The ECMF06-6AM16 can protect and filter 3
differential lanes.
µQFN-16L: 1.35 mm x 3.3 mm
Figure 1.Pin configuration (top view)
D0+
D0-
GND
D1+
D1-
GND
D2+
D2-
D0+
D0-
NC
D1+
D1-
GND
D2+
D2
February 2012Doc ID 022284 Rev 11/16
www.st.com
16
CharacteristicsECMF06-6AM16
1 Characteristics
Table 1.Absolute maximum ratings (T
amb
= 25 °C)
SymbolParameterValueUnit
V
PP
I
DC
T
op
T
j
T
stg
Peak pulse voltage
Maximum DC current100mA
Operating temperature-40 to +85°C
Maximum junction temperature125°C
Storage temperature range- 55 to +150°C
IEC 61000-4-2 contact discharge
IEC 61000-4-2 air discharge
10
30
Figure 2.Electrical characteristics (definitions)
I
SymbolParameter
V=Breakdown voltage
BR
I=Leakage current @ V
RMRM
V=Stand-off voltage
RM
I=Breakdown current
R
V
V
RM
BR
I
RM
I
R
kV
V
Table 2.Electrical characteristics (values, T
amb
= 25 °C)
SymbolTest conditionsMin.Typ.Max.Unit
V
BR
I
RM
R
DC
IR = 1 mA6V
V
= 3 V per line100nA
RM
DC serial resistance2.74Ω
2/16Doc ID 022284 Rev 1
ECMF06-6AM16Characteristics
Figure 3.SDD21 differential attenuation measurements (Z
SDD21 (dB)
0
-0.5
-1
-1.5
-2
-2.5
-3
100k1M10M100M1G
D2
D1
F/Hz
0 diff
Figure 4.SCC21 common mode attenuation measurements (Z
SCC21 (dB)
0
= 100 Ω)
D0
= 50 Ω)
0 com
-5
-10
-15
-20
-25
-30
-35
-40
100k1M10M100M1G
D2
D1
F/Hz
D0
Doc ID 022284 Rev 13/16
CharacteristicsECMF06-6AM16
Figure 5.SDD11 differential return loss measurements (Z
SDD11 (dB)
0
-5
-10
-15
-20
-25
-30
-35
-40
-45
10M30M100M300M1G3G
D2
D1
F/Hz
Figure 6.SDD22 differential attenuation measurements (Z
SDD22 (dB)
0
0 diff
D0
0 diff
= 100 Ω)
= 100 Ω)
-5
-10
-15
-20
-25
-30
-35
-40
10M30M100M300M1G3G
D2
D1
F/Hz
D0
4/16Doc ID 022284 Rev 1
ECMF06-6AM16Characteristics
Figure 7.SDDXX inter-lane differential cross-coupling measurements (Z
SDDxx (dB)
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
100k1M10M100M1G
D0-D1
F/Hz
D0-D2
0 diff
Figure 8.SCCXX inter-lane common-mode cross-coupling measurements (Z
SCCxx (dB)
0
= 100 Ω)
= 100 Ω)
0 diff
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
100k1M10M100M1G
D0-D1D0-D2
F/Hz
Doc ID 022284 Rev 15/16
CharacteristicsECMF06-6AM16
Figure 9.MIPI D-PHY low power mode test setup
Generator Agilent 81110
Pattern mode, F = 10 MHz
modulation RZ, 50outputΩ
Oscilloscope Lecroy
7300 A, 1 M inputΩ
CMF
Figure 10. Low power pulse response - see figure 9 for test setup
500 mV/div
Dx+
500 mV/div
Dx-
6/16Doc ID 022284 Rev 1
100 ns/div
100 ns/div
ECMF06-6AM16Characteristics
Figure 11. ESD response to IEC61000-4-2 (+8 kV contact discharge)
- see Figure 13 for test set-up
50 V/div
1
93 V
122 V
3
2
29 V
1
2
9V
24 V
9V
V : ESD peak voltage
1
V :clamping voltage @ 30 ns
2
V :clamping voltage @ 60 ns
3
V :clamping voltage @ 100 ns
4
3
11 V
PP
CL
CL
CL
7V
4
4
20 ns/div
Figure 12. ESD response to IEC61000-4-2 (-8 kV contact discharge)
- see Figure 13 for test set-up
50 V/div
4
-4 V
1
V : ESD peak voltage
PP
2
V :clamping voltage @ 30 ns
CL
3
V :clamping voltage @ 60 ns
CL
V :clamping voltage @ 100 ns
4
CL
4
-76 V
-120 V
1
-7 V
1
-23 V
2
2
-4 V
-6 V
3
3
-1 V
20 ns/div
Doc ID 022284 Rev 17/16
CharacteristicsECMF06-6AM16
Figure 13. ESD measurement test set-up
2 x 20 dB attenuator
ESD contact zap
±8 kV on pins
D0+
D0-
D0+
D0-
Oscilloscope
input
50 Ω
GND
D1+
D1-
GND
D2+
D2-
2 x 20 dB attenuator
NC
D1+
D1-
GND
D2+
D2 -
8/16Doc ID 022284 Rev 1
ECMF06-6AM16Application information
2 Application information
Figure 14. Application information
Display
DSI ReceiverDSI Transmitter
D0+
D0-
GND
D1+
D1-
GND
CLK+
CLK-
Application processor
D0+
D0-
GND
D1+
D1-
GND
CLK+
CLK-
Doc ID 022284 Rev 19/16
Ordering information schemeECMF06-6AM16
3 Ordering information scheme
Figure 15. Ordering information scheme
ECMF yy - x - z M16
Function
Common Mode Filter with ESD
protection
Number of filtered lines
yy = Number of filtered lines
Number of ESD protected lines
6 = 6 lines with ESD protection
Version
z = Version
Package
M = µQFN, pitch 400 µm
16 = 16 pads
10/16Doc ID 022284 Rev 1
ECMF06-6AM16Package information
4 Package information
●Epoxy meets UL94, V0
●Lead-free packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com
ECOPACK
Table 3.Micro QFN 3.3x1.35 16L dimensions
®
packages, depending on their level of environmental compliance. ECOPACK®
1.General recommendation on stencil opening design
a) Stencil opening dimensions: L (Length), W (Width), T (Thickness).
Figure 19. Stencil opening dimensions
L
T
W
b) General design rule
Stencil thickness (T) = 75 ~ 125 µm
W
Aspect Ratio
Aspect Area
-----
1.5≥=
T
LW×
---------------------------2T LW+()
0.66≥=
2. Reference design
a) Stencil opening thickness: 100 µm
b) Stencil opening for leads: Opening to footprint ratio is 90%.
Figure 20. Recommended stencil window position
30 µm
0.40
540 µm
10 µm
600 µm
180 µm
200 µm
Stencil window
Footprint
0.60
0.20
1.75
3.00
12/16Doc ID 022284 Rev 1
ECMF06-6AM16Recommendation on PCB assembly
5.2 Solder paste
1.Use halide-free flux, qualification ROL0 according to ANSI/J-STD-004.
2. “No clean” solder paste recommended.
3. Offers a high tack force to resist component displacement during PCB movement.
4. Use solder paste with fine particles: powder particle size 20-45 µm.
5.3 Placement
1.Manual positioning is not recommended.
2. It is recommended to use the lead recognition capabilities of the placement system, not
the outline centering.
3. Standard tolerance of ± 0.05 mm is recommended.
4. 3.5 N placement force is recommended. Too much placement force can lead to
squeezed out solder paste and cause solder joints to short. Too low placement force
can lead to insufficient contact between package and solder paste that could cause
open solder joints or badly centered packages.
5. To improve the package placement accuracy, a bottom side optical control should be
performed with a high resolution tool.
6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is
recommended during solder paste printing, pick and place and reflow soldering by
using optimized tools.
5.4 PCB design preference
1.To control the solder paste amount, the closed via is recommended instead of open
vias.
2. The position of tracks and open vias in the solder area should be well balanced. The
symmetrical layout is recommended, in case any tilt phenomena caused by
asymmetrical solder paste amount due to the solder flow away.
Doc ID 022284 Rev 113/16
Recommendation on PCB assemblyECMF06-6AM16
5.5 Reflow profile
Figure 21. ST ECOPACK® recommended soldering reflow profile for PCB mounting
Temperature (°C)
Temperature (°C)
260°C max
260°C max
255°C
255°C
220°C
220°C
180°C
180°C
125 °C
125 °C
3°C/s max
3°C/s max
0
0
01234567
012345 67
10-30 sec
10-30 sec
90 to 150 sec
90 to 150 sec
90 sec max
90 sec max
2°C/s recommended
2°C/s recommended
6°C/s max
6°C/s max
Time (min)
Time (min)
Note:Minimize air convection currents in the reflow oven to avoid component movement.
14/16Doc ID 022284 Rev 1
ECMF06-6AM16Ordering information
6 Ordering information
Table 4.Ordering information
Order codeMarkingPackageWeightBase qtyDelivery mode
ECMF06-6AM16KFµQFN-16L6.3 mg3000 Tape and reel
For the latest information on available order codes see the product pages on www.st.com.
7 Revision history
Table 5.Document revision history
DateRevisionChanges
14-Feb-20121Initial release.
Doc ID 022284 Rev 115/16
ECMF06-6AM16
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