Front panel LED controller and driver
evaluation board based on the STLED316S
Features
■ 8-segment, 6-digit customized LED display
■ 8-segment bar graph LED display
■ 7 front panel keys
■ 2 LEDs (green for power and red for interrupt)
■ 1 potentiometer for adjusting the brightness of
the display.
■ 1 reset switch to reset the system
■ Demo mode for making the system self-
performing and user independent
■ Embedded in-circuit programming capability
Description
This evaluation board implements a front panel for
the set top box and it is based on the LED driver/
controller STLED316S and microcontroller
ST7LITE39F2 as SPI master. The capabilities of
ST's LED controller/driver STLED316S fit the
market segment of front panel for HTiB (home
theater in a box), Set top boxes, DVD readers and
other similar applications that require a compact
and integrated solution, keeping the total system
cost as low as possible. When the board is
connected to the power supply the system gets
ready for any operation to perform. At the time of
manufacturing an additional board has been
connected to allow in-circuit programming of the
microcontroller, but, in any case the front panel
board can be used independently and alone.
STEVAL-CBP003V1
Data Brief
STEVAL-CBP003V1
March 2008 Rev 1 1/4
For further information contact your local STMicroelectronics sales office.
www.st.com
4
Board schematic STEVAL-CBP003V1
G1
_L
RQ_
SE
KS
SE
KS
SE
KS
SE
KS
SE
KS
SE
KS
SE
KS
KE
SE
KS
SE
KS
SE
KS
SE
KS
SE
KS
1_
LE
SE
KS
KE
SE
KS
SE
KS
RESE
RQ_
CCD
AT
CCCL
CCD
AT
RESE
CCCL
CL
KE
KE
1_
LE
GN
VCC
VCC
VCC
VCC
VCC
VCC5
STLED316S_SECTION
DISPLAY_SECTION
IC_TEST_PIN
MCU_SECTIO
VOLTAGE_REG.
t
15
ICC_CON
CH
CH
10
10
DE
DE
seg
seg
seg
seg
seg
seg
seg
seg
seg
seg
seg
seg
seg
seg
seg
seg
10
10
seg
seg
seg
seg
seg
seg
seg
seg
PS
1L3
PS
1L3
10
10
ED
316
ED
316
CL
SE
KS
SE
KS
SE
KS
SE
KS
KE
KE
SE
SE
KS
SE
KS
1_LE
SE
KS
SE
KS
VC
RESE
RESE
CH
CH
10
10
1_
LE
1_
LE
A1
se
g1
se
se
se
se
se
se
se
se
se
seg
seg
seg
seg
seg
seg
seg
seg
seg
seg
seg
seg
seg
seg
seg
seg
BR
BR
78
CV
78
CV
Vou
33uF
33uF
39
6_
39
6_
PA0
HS
PA1
HS
PA2
HS
PA3
HS
PA4
HS
PA5
HS
CCDA
PA6
CCCLK
BREA
PA7
HS
RESE
VD
VS
SC1
CLK
SC
PB0
SS
PB1
SCK
PB2
PB3
PB4
CLK
PB5
PB6
N6
RD
100
100
EN
EN
dap
dap
BR
BR
seg
seg
seg
seg
seg
seg
seg
seg
10
10
1 Board schematic
Figure 1. Schematic
10k
10k
R3
R3
A
D
LE
Y1
K
DIG1_
KE
IRQ_N
CL
8
6
4
2
J1
J1
7
5
3
1
D
Y2
GN
KE
STB
DIN/DOUT
V
o 15
8V t
tor Jack
tor Jack
J2 Adap
J2 Adap
2
1
3
0A
0A
1L3
1L3
D1
STPS
STPS
D1
1
C4 .33uF
C4 .33uF
Vin
GND
_TO_220
_TO_220
2
M05CV
M05CV
t
Vou
U1 L78
U1 L78
3
C3 100nF
5.0V
VCC
5.0V
VCC
C3 100nF
10uF 16V
10uF 16V
C2
C2
100nF
100nF
C1
C1
SO_20
SO_20
F2M6_
F2M6_
)/ATIC
)/LTIC
(HS
(HS
PA1
PA0
U2 ST7FLITE39
U2 ST7FLITE39
17
18
N
IRQ_
5.0V
VCC
K
T
AT
ICCCL
RESE
ICCD
10
8
6
4
2
J3 CON10A
J3 CON10A
9
7
5
3
1
.0V
IC_TEST_PIN
VCC5
D3 PWR
D3 PWR
R2 330
R2 330
DIN/DOUT
10
9
8
7
6
5
4
2
D
VD
)/ATPWM1
)/ATPWM0
(HS
(HS
PA3
PA2
14
15
16
STB
CLK
R1
R1
I
/RD
/AIN5
/AIN0
/AIN1
IN/AIN4
PB5
/SS
/AIN6
/SCK
/MOSI/AIN3
/MISO/AIN2
/CLK
PB0
PB6
PB1
PB3
PB2
PB4
TA
K
/BREA
IN
)/TDO
)/ATPWM3 /ICCDA
)/ATPWM2
/CLK
T
2
(HS
/MCO/ICCCLK
(HS
(HS
PA5
PA4
12
13
A
K
AT
ICCCL
ICCD
D2 IRQ
D2 IRQ
330
330
S
OSC
OSC1
VS
RESE
PA7
PA6
1
3
19
20
11
T
nF
nF
RESE
C5 10
C5 10
ICC_CON
MO
MO
DE
DE
U
U
OK
OK
MEN
MEN
_UP
_UP
_DWN
_DWN
CH
CH
CH
CH
GHT-
GHT-
5.0V
GHT+
GHT+
BR
BR
VCC
BR
BR
R6 2.2k
R6 2.2k
Y2
Y1
k
k
KE
KE
R5
10
R5
10
DIN/DOUT
k
k
R4
10
R4
10
23
22
Y1
N VOLTAGE_REG.
MCU_SECTIO
T
T
RESE
RESE
STLED316S_SECTION
Y2
KE
KE
S_SO_24
S_SO_24
D
316
316
DIG4
DIG1_LE
DIG3
DIG2
U3 STLED
U3 STLED
8
5
7
6
ED
_L
DIG5
DIG4
DIG3
DIG2
DIG1
D
LE
DISPLAY_SECTION
D7
D7
D6
D6
D5
D5
D4
D4
1
2
3
G1/KS
G2/KS
G3/KS
SE
SE
SE
21
19
20
1
1
3
2
G1/KS
G3/KS
G2/KS
SE
DIN/DOUT
SE
SE
K
DIG7
DIG6
DIG5
IRQ_N
STB
CL
4
3
2
12
11
10
N
STB
CLK
DIG7
DIG6
IRQ_
k
k
R7 10
R7 10
5.0V
VCC
8
4
5
6
7
G8/KS
G4/KS
G5/KS
G6/KS
G7/KS
SE
SE
SE
SE
SE
16
18
15
14
5
4
6
G5/KS
G4/KS
G6/KS
SE
SE
SE
T
C
VC
ISE
GND
9
24
17
360
360
k
k
R8 0 to 10
R8 0 to 10
25V
25V
C7
C7
nF
nF
C6
C6
2
1
G2/KS
13
7
G7/KS
SE
R9
R9
33uF
33uF
100
100
G1/KS
SE
SE
8
G8/KS
SE
DIG1_
9
8
7
6
5
4
3
10
0
D
D
A9
A8
A7
A6
A5
A4
A1
LE
LE
0
g4
g5
g6
g7
g8
g9
g1
se
se
se
se
se
se
se
U4 DIG1_
U4 DIG1_
6
7
G6/KS
G7/KS
SE
SE
18
17
16
15
14
13
12
11
seg
2
1
seg
1
2
CACA2
3
seg
6
4
seg
7
5
U10
U10
seg
2
1
seg
1
2
CACA2
3
seg
6
4
seg
7
5
U9
U9
seg
2
1
seg
1
2
CACA2
3
seg
6
4
seg
7
5
U8
U8
seg
2
1
seg
1
2
CACA2
3
seg
6
4
seg
7
5
U7
U7
seg
2
1
seg
1
2
CACA2
3
seg
6
4
seg
7
5
U6
U6
seg
2
1
seg
1
2
CACA2
3
seg
6
4
seg
7
5
1
MH1
MH1
1
MH2
MH2
2
1
1
A3
A2
A1
MH3
MH3
1
MH4
MH4
g1
g2
g3
se
se
se
20
19
seg
8
10
seg
3
9
CA
8
seg
4
7
seg
5
6
DIG7
DIG7
seg
8
10
seg
3
9
CA
8
seg
4
7
seg
5
6
5
DIG6
DIG6
G5/KS
SE
seg
8
10
seg
3
9
CA
8
seg
4
7
seg
5
6
DIG5
DIG5
seg
8
10
seg
3
9
CA
8
seg
4
7
seg
5
6
DIG4
DIG4
seg
8
10
seg
3
9
CA
8
seg
4
7
seg
5
6
DIG3
DIG3
seg
8
10
seg
3
9
CA
8
seg
4
7
seg
5
6
U5
U5
DIG2
DIG2
DIG7
DIG6
8SK/8GES 8SK/8GES
3
4
G3/KS
G4/KS
SE
SE
DIG5
DIG4
DIG3
DIG2
2/4
STEVAL-CBP003V1 Revision history
2 Revision history
Table 1. Document revision history
Date Revision Changes
10-Mar-2008 1 Initial release.
3/4
STEVAL-CBP003V1
y
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