ST BTW68 User Manual

BTW68

30 A SCRs

Features

■ On-state rms current: 30 A

■ Blocking voltage: up to 1200 V

■ Gate current: 50 mA

■ UL 2500 V insulation (file ref E81734)

Description

Available in a high power insulated package, the BTW68 series is suitable for applications where power handling and power dissipation are critical such as solid state relays, welding equipment and high power motor control.

Based on a clip assembly technology, this device offers a superior performance in surge current handling capabilities.

Thanks to the internal ceramic pad, the device provides high voltage insulation (2500 V complies with UL standards (file ref: E81734).

RMS)

and

A

G

K

A

G

TOP3 ins.

Table 1. Device summary

Symbol Value

I

T(RMS)

V

DRM/VRRM

I

GT

30 A

600 to 1200 V

50 mA

July 2010 Doc ID 17757 Rev 3 1/8

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8

Characteristics BTW68

1 Characteristics

Table 2. Absolute maximum ratings (limiting values)

Symbol Parameter Value Unit

I

T(RMS)

IT

I

dI/dt

P

T

V

Table 3. Electrical characteristics (Tj = 25 °C, unless otherwise specified)

On-state current rms (180° conduction angle) Tc = 80 °C 30 A

Average on-state current (180° conduction angle) Tc = 80 °C 19 A

(AV)

= 8.3 ms

t

Non repetitive surge peak on-state

TSM

current

²

I

tI²t Value for fusing Tj = 25 °C 800 A

Critical rate of rise of on-state current

= 2 x IGT , tr ≤ 100 ns

I

G

I

Peak gate current tp = 20 µs Tj = 125 °C 8 A

GM

Average gate power dissipation Tj = 125 °C 1 W

G(AV)

Storage junction temperature range

stg

T

Operating junction temperature range

j

Maximum peak reverse gate voltage 5 V

RGM

p

tp = 10 ms 400

F = 60 Hz T

= 25 °C

T

j

= 125 °C 100 A/µs

j

420

- 40 to + 150

- 40 to + 125

Symbol Test conditions Value Unit

I

GT

V

dV/dt

V

I

DRM

I

RRM

Table 4. Thermal resistance

VD = 12 V, RL = 33 Ω

GT

VD = V

t

I

GD

gt

H

L

DRM, RL

VD = V

DRM

IT = 500 mA, gate open MAX. 75 mA

IG = 1.2 x I

V

= 67 % V

D

= 3.3 kΩ Tj = 125 °C MIN. 0.2 V

, IG = 200 mA, dIG/dt = 1.5 A/µs TYP. 2 µs

GT

DRM

gate open

TMITM

t

q

= 60 A, tp = 380 µs MAX. 2.1 V

V

= V

DRM

VD = 67% V dI

TM

RRM

, ITM = 60 A, VR = 75 V

DRM

/dt = 30 A/µs, dVD/dt = 20 V/µs

= 800 V

V

DRM

= 1000 V 250

V

DRM

Tj = 125 °C MIN.

Tj = 25 °C

= 125 °C 6 mA

T

j

= 125 °C TYP. 100 µs

T

j

MIN. 50 mA

MAX. 1.5 V

TYP. 40 mA

500

V/µs

20 µA

MAX.

A

°C

2

S

Symbol Parameter Value Unit

R

Junction to case (D.C.) 1.1 °C/W

th(j-c)

Junction to ambient 50 °C/W

th(j-a)

2/8 Doc ID 17757 Rev 3

BTW68 Characteristics

Figure 1. Maximum average power

dissipation versus average on-state current

P(W)

50

40

30

α = 60°

α = 30°

20

10

0

0 5 10 15 20 25 30 35

α = 120°

α = 90°

α = 180°

I (A)

T(RMS)

D.C.

360°

α

Figure 3. Average on-state current versus case

temperature

I (A)

T(AV)

50

DC

40

30

α = 180°

Figure 2. Correlation between maximum

average power dissipation and maximum allowable temperature

P(W)

50

R = 1°C/W

th

40

30

20

R = 2°C/W

th

10

0

0 20 40 60 80 100 120 140

R = 3°C/W

th

R = 0°C/W

th

T (°C)

amb

T (°C)

α = 180°

(T and T )

amb lead

case

Figure 4. Relative variation of thermal

impedance versus pulse duration

K=[Z /R

1.00

0.10

th(j-c) th(j-c)

]

Z

th(j-c)

50

75

100

125

20

10

T (°C)

0

025 7550 100 125

case

Figure 5. Relative variation of gate trigger

current versus junction temperature

I,I,I[T] /

GT H L j

2.5

2

1.5

1

0.5

0

I ,I ,I [T =25°C]

GT H L j

I

GT

IH& I

L

T (°C)

j

-20-30-40 0 10-10 20 4030 50 60 70 80 90 100 110 120 130

Z

th(j-a)

0.01

t (s)

0.0

1E-3 1E-2 1E-1 1E+0 1E+1 1E+2 1E+3

p

Figure 6. Surge peak on-state current versus

number of cycles

I (A)

TSM

350

300

250

200

150

100

50

0

1 10 100 1000

T initial=25°C

j

Number of cycles

t =10ms

p

One cycle

Doc ID 17757 Rev 3 3/8