ST AN971 Application note
AN971
APPLICATION NOTE
I2C COMMUNICATION BETWEEN
ST7 AND M24Cxx EEPROM
by Microcontroller Division Applications
INTRODUCTION
The goal of this application note is to present an practical example of communication using the I2C peripheral of the ST7. It shows a basic single master communication between a ST7 microcontroller and an M24Cxx I2C bus EEPROM. The purpose is to implement, from the ST7 through the I2C interface, a write and a read to the external EEPROM without error management.
AN971/0403 |
1/7 |
1
I2C COMMUNICATION BETWEEN ST7 AND M24Cxx EEPROM
1 ST7 I2C INTERFACE
The ST7 I2C peripheral allows multi master and slave communication with bus error management. In this application, only single master mode is used without error management. As polling mode is the most difficult mode to implement, the application is based on this mode, but it can be easily adapted for interrupt management.
The I2C synchronous communication needs only two signals: SCL (Serial clock line) and SDA (Serial data line). The corresponding port pins have to be configured as floating inputs.
Please refer to the ST7 datasheet for more details.
1.1 COMMUNICATION SPEED
The ST7 I2C peripheral allows a large range of communication speeds. It is able to work in standard and fast I2C modes.
In master mode the communication speed is given by the Clock Control Register (CCR). An example is given in Table 1.
Table 1. Example of Possible I2C Communication Speeds (fCPU=8 MHz)
|
|
Standard Mode |
|
|
Fast Mode |
|
||||
|
|
|
|
|
|
|
|
|
|
|
Speed [KHz] |
15.5 |
25.00 |
50.00 |
70.00 |
100.00 |
167.00 |
|
190.00 |
|
333.00 |
|
|
|
|
|
|
|
|
|
|
|
CCR [hex] |
EC |
9E |
4E |
37 |
26 |
8E |
|
8C |
|
86 |
|
|
|
|
|
|
|
|
|
|
|
1.2 START, STOP CONDITION AND ACKNOWLEDGE GENERATION
In master mode, the Start and Stop conditions can be generated by setting the START and STOP bits in the Control Register (CR).
An Acknowledge is sent after an address or a data byte is received when the ACK bit is set in the Control Register (CR).
2/7
2
I2C COMMUNICATION BETWEEN ST7 AND M24Cxx EEPROM
2 ST7 / M24CXX I2C COMMUNICATION APPLICATION
2.1 HARDWARE CONFIGURATION
The ST7 / M24Cxx I2C communication application hardware consists of a ST72264 microcontroller which communicates with an external M24C08 EEPROM through an I2C bus interface.
Figure 1. ST7 / EEPROM I2C Communications Application
ST72264
I2C
5V
VDD
2x27KΩ M24C08
SCL 
SCL
SDA 
SDA
2x100Ω
VSS |
|
|
|
|
|
|
|
|
|
|
E |
|
Address=A0h |
|
|
|
|
|
|
|
|
|
|
||||
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2.2 ST7 I2C PERIPHERAL BASIC DRIVERS
In this chapter all registers refer to the ST7 I2C peripheral (unless otherwise specified).
2.3 INITIALIZE THE I2C PERIPHERAL
In this application the initialization of the ST7 I2C peripheral is done completely by software without taking into account the hardware reset status.
First the Control Register (CR) is cleared and the Data (DR) and Status (SR1,SR2) registers are touched to clear any pending events.
Then, the peripheral is enabled through the Control Register (CR). This action needs to write twice in the register due to the fact that the Control Register (CR) bits can be set only when the PE enable bit is already set. To allow the peripheral to acknowledge the received data the ACK bit of the Control Register (CR) is set.
As the ST24C08 EEPROM is specified with a maximum I2C clock speed at 100KHz, the ST7 I2C peripheral is set to this speed (CCR=26h) in the application.
3/7
Loading...