ST AN969 Application note

AN969

APPLICATION NOTE

SCI COMMUNICATION BETWEEN ST7 AND PC

by Microcontroller Division Applications

INTRODUCTION

This document presents a standard communications interface between a ST7 microcontroller and a PC. This communication is done through the ST7 SCI peripheral and a serial port of the PC using the RS232 protocol.

AN969/0102

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ST AN969 Application note

SCI COMMUNICATION BETWEEN ST7 AND PC

1 SCI COMMUNICATION

The main features of the SCI communication peripheral are summarized below. Refer to your ST7 datasheet for more details.

1.1 MAIN FEATURES

The Serial Communication Interface (SCI) offers a flexible means of full-duplex data exchange with external equipment requiring an industry standard NRZ asynchronous serial data format.

The SCI allows a very wide range of baud rates with different baud rates for transmission and reception.

For SCI communication, only two signals are needed, one for transmission and the other for reception. No clock signal is needed as it works in asynchronous mode. Each device has a Transmit Data Output pin (TDO pin) and a Receive Data Input pin (RDI pin). See Figure 1.

Figure 1. ST7 and SCI interface set-up

 

 

DEVICE

ST7

 

 

SCI Interface

TDO

RDI

 

RDI

TDO

The user must be very careful in identifying the use of each pin. This can easily be done putting the device in transmission and checking with an oscilloscope if a transmission frame is present or not.

1.2 BAUD RATES

Transmission and reception can be driven by their own baud rate generator. However be aware that to communicate correctly, the receiver must have a reception baud rate strictly equal to the transmission baud rate of the transmitter. If not, the communication will be corrupted. As long as this condition is met, a wide range of baud rates is possible.

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SCI COMMUNICATION BETWEEN ST7 AND PC

1.3 FRAMES

Any transmission is Least Significant Bit first. A data word can be 8 or 9 bits long. A data frame begins with a «start bit», which is a ’0’ bit and ends with a «stop bit», which is a ’1’ bit. See Figure 2.

Two special frames are also managed :

An Idle character is interpreted as an entire frame of ’1’ bits followed by the start bit of the next frame which contains data.

A Break character is detected when receiving ’0’ bits for some multiple of the frame period. At the end of the last break, the transmitter inserts an extra ’1’ bit to acknowledge the next start bit.

Figure 2. Frames and word length

9-bit Word length (M bit of SCICR1 is set)

Next Data Frame

 

 

 

Start

 

Data Frame

 

Next

 

 

 

 

 

 

Bit0

Bit1

Bit2

Bit3

Bit4

Bit5

Bit6

Bit7

Bit8

Stop

Start

 

 

 

 

 

 

Bit

Bit

Bit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Start

 

 

 

 

 

 

 

 

Idle Frame

 

 

 

 

 

 

 

 

 

 

Bit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Start

 

 

 

 

 

 

Break Frame

 

Extra

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

’1’

 

Bit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8-bit Word length (M bit of SCICR1 is reset)

Next Data Frame

 

 

 

Start

 

Data Frame

 

 

 

Next

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bit0

Bit1

Bit2

Bit3

Bit4

Bit5

Bit6

Bit7

Stop

Start

 

 

 

 

 

 

Bit

Bit

Bit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Start

 

 

 

 

 

 

 

 

 

Idle Frame

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Start

 

 

 

 

 

 

 

Break Frame

 

 

 

Extra

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

’1’

 

Bit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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