ST AN900 Application note

AN900

APPLICATION NOTE

INTRODUCTION TO SEMICONDUCTOR TECHNOLOGY

by Microcontroller Division Applications

INTRODUCTION

An integrated circuit is a small but sophisticated device implementing several electronic functions. It is made up of two major parts: a tiny and very fragile silicon chip (die) and a package which is intended to protect the internal silicon chip and to provide users with a practical way of handling the component. This note describes the various “front-end” and “back-end” manufacturing processes and takes the transistor as an example, because it uses the MOS technology. Actually, this technology is used for the majority of the ICs manufactured at STMicroelectronics.

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1 THE FABRICATION OF A SEMICONDUCTOR DEVICE

The manufacturing phase of an integrated circuit can be divided into two steps. The first, wafer fabrication, is the extremely sophisticated and intricate process of manufacturing the silicon chip. The second, assembly, is the highly precise and automated process of packaging the die. Those two phases are commonly known as “Front-End” and “Back-End”. They include two test steps: wafer probing and final test.

Figure 1. Manufacturing Flow Chart of an Integrated Circuit

"Front-End" "Back-End"

WAFER	Wafer		ASSEMBLY				Final
FABRICATION							Test
	Probing

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1.1 WAFER FABRICATION (FRONT-END)

Identical integrated circuits, called die, are made on each wafer in a multi-step process. Each step adds a new layer to the wafer or modifies the existing one. These layers form the elements of the individual electronic circuits.

The main steps for the fabrication of a die are summarized in the following table. Some of them are repeated several times at different stages of the process. The order given here doesn't reflect the real order of fabrication process.

		This step shapes the different components. The principle is quite simple (see draw-
	PhotoMasking	ing on next page). Resin is put down on the wafer which is then exposed to light
		through a specific mask. The lighten part of the resin softens and is rinsed off with
		solvents (developing step).
		This operation removes a thin film material. There are two different methods: wet
	Etching	(using a liquid or soluble compound) or dry (using a gaseous compound like oxygen
		or chlorine).
		This step is used to introduce dopants inside the material or to grow a thin oxide
	Diffusion	layer onto the wafer. Wafers are inserted into a high temperature furnace (up to
		1200 ° C) and doping gazes penetrate the silicon or react with it to grow a silicon
		oxide layer.
	Ionic	It allows to introduce a dopant at a given depth into the material using a high energy
	Implantation	electron beam.
	Metal	It allows the realization of electrical connections between the different cells of the
		integrated circuit and the outside. Two different methods are used to deposit the
	Deposition
		metal: evaporation or sputtering.

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Wafers are sealed with a passivation layer to prevent the device from contamina- Passivation tion or moisture attack. This layer is usually made of silicon nitride or a silicon oxide

composite.

It’s the last step of wafer fabrication. Wafer thickness is reduced (for microcontroller Back-lap chips, thickness is reduced from 650 to 380 microns), and sometimes a thin gold

layer is deposited on the back of the wafer.

Initially, the silicon chip forms part of a very thin (usually 650 microns), round silicon slice: the raw wafer. Wafer diameters are typically 125, 150 or 200 mm (5, 6 or 8 inches). However raw pure silicon has a main electrical property: it is an isolating material. So some of the features of silicon have to be altered, by means of well controlled processes. This is obtained by "doping" the silicon.

Dopants (or doping atoms) are purposely inserted in the silicon lattice, hence changing the features of the material in predefined areas: they are divided into “N” and “P” categories representing the negative and positive carriers they hold. Many different dopants are used to achieve these desired features: Phosphorous, Arsenic (N type) and Boron (P type) are the most frequently used ones. Semiconductors manufacturers purchase wafers predoped with N or P impurities to an impurity level of.1 ppm (one doping atom per ten million atoms of silicon).

There are two ways to dope the silicon. The first one is to insert the wafer into a furnace. Doping gases are then introduced which impregnate the silicon surface. This is one part of the manufacturing process called diffusion (the other part being the oxide growth). The second way to dope the silicon is called ionic implantation. In this case, doping atoms are introduced inside the silicon using an electron beam. Unlike diffusion, ionic implantation allows to put atoms at a given depth inside the silicon and basically allows a better control of all the main parameters during the process. Ionic implantation process is simpler than diffusion process but more costly (ionic implanters are very expensive machines).

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Figure 2. Diffusion and Ionic Implantation Processes

DIFFUSION PROCESS

IONIC IMPLANTATION

PROCESS

OXIDE GROWTH

DOPING

DOPING

Oxygen (O 2)

Electron Beam

HIGH TEMPERATURE

Doping atoms

VACUUM

SiO 2

DIFFUSION FURNACE

IONIC IMPLANTER

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Photomasking (or masking) is an operation that is repeated many times during the process. This operation is described on the above graph. This step is called photomasking because the wafer is “masked” in some areas (using a specific pattern), in the same way one “masks out” or protects the windscreens of a car before painting the body. But even if the process is somewhat similar to the painting of a car body, in the case of a silicon chip the dimensions are measured in tenth of microns. The photoresist will replicate this pattern on the wafer. The exposed part of the photoresist is then rinsed off with a solvent (usually hydrofluoric or phosphoric acid).

Figure 3. Photomasking Process

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Metal deposition is used to put down a metal layer on the wafer surface. There are two ways to do that. The process shown on the graph below is called sputtering. It consists first in creating a plasma with argon ions. These ions bump into the target surface (composed of a metal, usually aluminium) and rip metal atoms from the target. Then, atoms are projected in all the directions and most of them condense on the substrate surface.

Figure 4. Metal Deposition Process

POWER SUPPLY

CATHODE

METAL

ATOMS

PLASMA

Thin Metal Layer

SUBSTRATE

ANODE

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Etching process is used to etch into a specific layer the circuit pattern that has been defined during the photomasking process. Etching process usually occurs after deposition of the layer that has to be etched. For instance, the poly gates of a transistor are obtained by etching the poly layer. A second example are the aluminium connections obtained after etching of the aluminium layer.

Figure 5. Etching Process

BEFORE

Photoresist Mask

Thin Film to be etched

Substrate

AFTER

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