ST AN900 Application note
AN900
APPLICATION NOTE
INTRODUCTION TO SEMICONDUCTOR TECHNOLOGY
by Microcontroller Division Applications
INTRODUCTION
An integrated circuit is a small but sophisticated device implementing several electronic functions. It is made up of two major parts: a tiny and very fragile silicon chip (die) and a package
which is intended to protect the internal silicon chip and to provide users with a practical way
of handling the component. This note describes the various “front-end” and “back-end” manufacturing processes and tak es the transistor as an example, beca use it uses the MOS technology. Actually, this technology is used for the m a jority of the ICs manufactu red at STMicroelectronics.
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INTRODUCTION TO SEMICONDUCTOR TECHNOLOGY
1 THE FABRICATION OF A SEM ICONDUCTOR DEVICE
The manufacturing phase of an integrated c ircui t can be d ivided into two steps. The firs t,
wafer fabrication , is the extreme ly sop histicated and intricate proces s of manufa cturing the
silicon chip. The second, assembly, is the highly precise and automated process of pack-
aging the die. Those two phases are commonly known as “Front-End” and “Back-End”. They
include two test steps: wafer probing and final t est.
Figure 1. Manufacturing Flow Chart of an Integrated Circuit
"Front-End" "Back-End"
WAFER
FABRICATION
Wafer
Probing
ASSEMBLY
Final
Test
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1.1 WAFER FABRICATION (FRONT-END)
Identical integrated circuits, called die, are made on each wafer in a multi-step process. Each
step adds a new la ye r t o th e w afer or mod ifies the e xis ting o ne . Thes e l ayer s fo rm t he e lements of the individual electronic circuits.
The main steps for the fabrication of a die are summarized in the following table. Some of
them are repeated several times at different stages of the process. The order given here
doesn't reflect the real order of fabrication process.
This step shapes the different components. The principle is quite simple (see draw-
PhotoMasking
Etching
Diffusion
Ionic
Implantation
Metal
Deposition
ing on next page). Resin is put down on the wafer which is then exposed to light
through a specific mask. The lighten part of the resin softens and is rinsed off with
solvents (developing step).
This operation removes a thin film material. There are two different methods: wet
(using a liquid or soluble compound) or dry (using a gaseous compound like oxygen
or chlorine).
This step is used to introduce dopants inside the material or to grow a thin oxide
layer onto the wafer. Wafers are inserted into a high temperature furnace (up to
1200 ° C) and doping gazes penetrate the silicon or react with it to grow a silicon
oxide layer.
It allows to introduce a dopant at a given depth into the material using a high energy
electron beam.
It allows the realization of electrical connections between the different cells of the
integrated circuit and the outside. Two different methods are used to deposit the
metal: evaporation or sputtering.
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INTRODUCT ION TO SEMICO NDUCTOR TE CHNOLOGY
Wafers are sealed with a passivation layer to prevent the device from contamina-
Passivation
Back-lap
tion or moisture attack. This layer is usually made of silicon nitride or a silicon oxide
composite.
It’s the last step of wafer fabrication. Wafer t hickness is reduced (for microcontroller
chips, thickness is reduced from 650 to 380 microns), and sometimes a thin gold
layer is deposited on the back of the wafer.
Initially, the silicon chip forms part of a very thin (usually 650 microns), round silicon slice: the
raw wafer. Wafer diameters are typically 125, 150 or 200 mm (5, 6 or 8 inches). However raw
pure silicon has a main electrical property: it is an isolating material. So some of the features
of silicon have to b e altered, b y means of well controlled proc esses. This is obtained by
"doping" the silicon.
Dopants ( or do ping a tom s) ar e purp osely ins e rted in th e silic on lat tice, he nce c han ging t he
features of the material in predefined areas: they are divided into “N” and “P” categories representing t he negative and positive carriers they hold. M any di ffere nt do pants a re u se d to
achieve these desired features: Phosphorous, Arsenic (N type) and Boron (P type) are the
most frequently used ones. Semiconductors manufacturers purchase wafers predoped with N
or P impurities to an i mpurity level of.1 ppm (one doping atom per ten million atoms of silic on).
There are two ways to dope the silicon. The first one is to insert the wafer into a furnace.
Doping gases are then introduced which impregnate the silicon surface. This is one part of the
manufacturing process called diff usi on (the other part being the oxide grow th). The second
way to dope the silicon is called ionic impl antation. In this case, doping atoms are introduced
inside the silicon using an ele ctron beam. Un like diffusion, ionic implant ation allows to put
atoms at a g iven de pth ins ide the silicon and bas ically allows a better contr ol of all t he ma in
parameters dur ing the pr ocess . Io ni c im plant ation proc ess is si mpler than d iffus ion proc ess
but more costly (ionic implanters are very expensive machines).
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INTRODUCTION TO SEMICONDUCTOR TECHNOLOGY
Figure 2. Diffusion and Ionic Implanta tion Processes
DIFFUSI ON PROCESS
OXIDE GROWTH
Oxygen (O )
2
SiO
DIFFUSION FURNACE
DOPING DOPING
HIGH TEMPERATURE
Doping atoms
2
IONIC IMPLANTATION
PROCESS
Electron Beam
VACUUM
IONIC IMPLANTER
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Photomasking (or masking) is an operation that is repeated many times dur ing the process.
This operation is described on the above graph. This step is called photomasking because the
wafer is “masked” in some areas (using a specific pattern), in the same way one “masks out”
or protects the windscreens of a car before painting the body. But even if the process is somewhat similar to the painting of a car body, in the case of a silicon chip the dimensions are
measured in tenth of m icro ns. The photoresi st will replicate this pattern on the wafer. The exposed p art of th e photor esist is then rinsed o ff wit h a solve nt (usu ally hy drofl uoric or phos phoric acid).
Figure 3. Photomasking Process
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INTRODUCT ION TO SEMICO NDUCTOR TE CHNOLOGY
Metal dep osi ti o n is used to put down a metal layer on the wafer surface. There are two ways
to do that. The process shown on the graph below is called sputtering. It consists first in creating a plasma with argon ions . These ions bump into the target surface (composed of a metal,
usually aluminium) and rip metal atoms from the target. Then, atoms are projected in all the directions and most of them condense on the substrate surface.
Figure 4. Metal Deposition Process
POWER SUPPLY
CATHODE
METAL
ATOMS
PLASMA
Thin Metal Layer
SUBSTRATE
ANODE
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Etching process is used to etch into a specific layer the circuit pattern that has been defined
during the photomasking process. Etching process usually occurs after deposition of the layer
that has to be etched. Fo r instance, the poly gates of a transistor are obtained by etching the
poly layer. A second example are the aluminium connections obtained after etching of the aluminium layer.
Figure 5. Etching Process
Photoresist Mask
Thin Film to be etched
BEFORE
Substrate
AFTER
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