ST AN628 Application note

AN628

APPLICATION NOTE

DESIGNING A HIGH POWER FACTOR SWITCHING

PREREGULATOR WITH THE L4981 CONTINUOUS MODE

by Ugo Moriconi

INTRODUCTION

Conventional AC-DC converters usually employ a full wave rectifier bridge with a simple capacitor filter to draw
power from the AC line. This "bulk" capacitor must be big enough to supply the total power during most of each
half-cycle, while instantaneous line voltage is below the DC rectified voltage. Consequentely, the line current
waveform is a narrow pulse, and the power factor is poor (0.5-0.6) due to the high harmonic distortion of the
current waveform.

If a high power factor switching preregulator is interposed between the input rectifier bridge and the bulk filter
capacitor, the power factor will be improved (up to 0.99). Increasing in addition, the RMS current capability from
the mains, reducing the bulk capacitor peak current and the harmonic disturbances.

Switching at a frequency much higher than the line's one, the preregulator draws a sinusoidal input current, in
phase with the input line voltage.

There are several way that this can be accomplished. When the output voltage is higher than the input voltage
(Vo > Vin), BOOST topology and continuos inductor current control mode are well suited to produce a good
quality input sine current waveform. The input di/dt is low because the inductor is located between the bridge
and the switch. This minimizes line noise and the line spikes will be absorbed by the inductor.

Figure 1. L4981 Block Diagram

April 2004

1/35

AN628 APPLICATION NOTE

THE L4981 PFC CONTROLLER IC

The L4981 integrated circuit is a continous mode average current controller with several specific functions for
active power factor correction. It can operate in high quality, medium/high power conversion range and provides
all the necessary features to achieve a very high power factor, up to 0.99. Thanks to the BCD technology used,
operative switching frequency higher than 200kHz can be used.

The L4981 can be used in systems with universal input mains voltage without any line switch.

This new PFC offers the alternative of synchronization working at fixed frequency (L4981A), or working in mod­ulated frequency (L4981B) to optimize the size of the input filter. Both devices control the conversion in average
current mode PWM to maintain a sinusoidal line current without slope compensation.

MAIN FEATURES:

■ Switching frequency higher than 200 kHz.

■ Under Voltage Lockout with hysteresis and programmable turn-on threshold.

■ Overvoltage and Overcurrent Protection.

■ Precise (2%) on chip Reference externally available.

■ Input/Output Synchronization (only for L4981A).

■ Feed Forward Line and Load regulation.

■ Universal input mains.

■ Average current mode PWM.

■ High Output Current totem pole driver.

■ Low Start-up supply current.

■ Soft Start.

P.F.C. BOOST TOPOLOGY OPERATION

The operation of the P.F.C. boost converter (see fig. 2) can be summarized in the following description.

The A.C. line voltage is rectified by a diode bridge and the rectified voltage delivered to the boost converter. The
boost converter section, using a PWM switching technique, boosts the rectified input voltage to a D.C. controlled
output voltage (V

). The section consists of a boost inductor (L), a controlled power switch (Q), a boost diode

O

(D), an output capacitor (CO) and, obviously, a control circuitry.

Referring to the time-variable mains voltage (sine waveform), the converter produces a boost inductor average
current like the rectified input voltage, changing continuosly the duty-cycle of the active switch (Q).

The boosted D.C. voltage is controlled to a programmed value, higher than the maximum input instantaneous
voltage (V

Ipk

).

Referring to the main currents shown in fig.2 schematic, the simplified formulae are (assuming: power efficiency
= 1; output ripple voltage = 0; high frequency inductor ripple current = 0):

1) Peak inductor (L), switch (Q) and diode (D) currents

P

O

---------- -

I

LpkIQpkIDpk

2

⋅===

V

lpk

2) RMS inductor current

P

O

I

Lrms

---------- -

2

⋅=

V

lpk

2/35

Figure 2.

AN628 APPLICATION NOTE

~

~

3) RMS switch current

4) Average diode current

5) RMS diode current

6) Total RMS capacitor (CO) current

L

O

lpk

= I

I

Q

16 V

2

-----------------------–⋅=

3 π V

O

16 V

---------------------- -⋅=
⋅⋅

3 π V

⋅⋅

⋅

I

L

C

in

P

O

I

Qrms

---------- -

V

lpk

I

Davg

P

I

Drms

---------- -

V

⋅

lpk

QCONTROLLER

lpk

O

D

I

D

D94IN119

O

I

O

I

C

C

O

LOAD

16 VO⋅

I

CIO

-------------------------- - 1–=
3 π V

⋅⋅

Ipk

7) RMS twice line frequency capacitor current

I

I

C2f()rms

O

-------=

2

8) RMS high frequency capacitor current

16 VO⋅

I

Chf()rmsIO

The figure 3 shows the above mentioned quantities, normalized to the D.C. output current (I
V

/ VO ratio. Moreover, the I

Ipk

Lpk

· I

normalized to I

Lrms

-------------------------- 1.5–=
3 π V

⋅⋅

lpk

), plotted versus

2

value, related to the inductor energy (I2 · L), is plotted

O

O

in the diagram (dotted line). This last plot gives an idea on the heavy increase of the inductor size operating
with large input voltage range.

Obviously, in real application the efficiency is less than 100% (
output capacitor (C

) is a parameter to be considered. The inductor high frequency current ripple (∆IL) is anoth-

O

er parameter affected by the inductor value (L), the switching frequency (f

η

< 1). The output voltage ripple, related to the

) and the delivered power (PO).

sw

3/35

AN628 APPLICATION NOTE

Figure 3.

I

⋅

LpkILrms

----------------------------

2

I

o

Figure 4.

4/35

AN628 APPLICATION NOTE

CONTROLLER FUNCTION DESCRIPTION.

The L4981 I.C. controls the conversion process with a continuous mode average current method, using two con­trol loops (current loop and voltage loop) see fig. 5. Moreover, several internal functions ensure high quality con­version performance.

A description of the internal blocks will be detailed in the design criteria section and pin description. However,
referring to fig. 4, here below a brief description of the main functions is done:

Multiplier block.

This block produces an output current (programming current) as a product result of four different input signals
(see fig. 13 for details). The multiplier output current, through a resistor connected to the negative side of a
sense resistor, determines the error signal to the current loop.

Figure 5.

VOLTAGE

CONTROL LOOP

Figure 6.

LINE

CURRENT

CONTROL LOOP

L

REF

Raux

Ripk

Iaux

IPK

I

D94IN061

11 8.5V

R

Ipk

POWER

STAGE

S

LOAD

OSC

I

ipk

-

+

1,10

GND

S

Q

R

D94IN062A

Operational amplifier blocks.

Two amplifiers allow loop control. The first one (E/A), feeds back the output voltage (VO) and delivers its output
to the multiplier block. The second (C/A), feeds back the line current and produces the reference for the PWM
section.

5/35

AN628 APPLICATION NOTE

PWM block.

This block, comparing the sawtooth produced by the oscillator, with the reference signal from the C/A output,
modulates its output signal duty-cycle. Its output, by the logic and driver sections, allows the controlled switch
(Q) to modulate the inductor current.

Logic block.

Controls the flow from the PWM and the output with the Auxiliary function signals and soft start.

Driver block.

The driver supplies the gate current to turn on and off the power switch (Q). It delivers up to 1A peak current to
allow high switching frequency applications.

Aux functions.

The Auxiliary functions allow to avoid overstress on power components of the application.

Power supply block.

This circuitry delivers the internal supply and references, recognizes the Undervoltage and Stand-by conditions
to save consumption.

P.F.C. BOOST DESIGN CRITERIA

L4981 PIN DESCRIPTION AND BIASING CIRCUITRY.

Pin 1.

P-GND (Power stage ground). This pin, on the pc-board, has to be connected close the external Mosfet

source.

Pin 2.

IPK (Overcurrent protection input). The current limitation is obtained with an internal comparator that holds
down the output driver when the voltage at IPK input goes down to zero. In the L4981A, to preset the IPK input
there is an internal current source (I
connecting (see fig. 6) a single resistor (R

) of typically 85µA. The maximum peak current (Ipk) can be programmed

ipk

) between this pin and the sense resistor (RS):

ipk

RSIpk⋅

R

In the L4981B, to preset the IPK input, an auxiliary resistor (R
is required. The maximum peak current (I
R

:

ipk

) can be programmed choosing (see fig. 6) the resistances R

pk

ipk

-------------------=

I

ipk

), connected from the VREF pin to the IPK pin,

aux

and

aux

RSIpk⋅

Where:

R

I

aux

ipk

-------------------=

V

VREF

----------------- -=

R

I

aux

aux

Note: If used with the L4981A, the auxiliary resistor avoids that the current source spread affects the precision
of the protection simply getting an auxiliary current (I

) much higher than I

aux

ipk

.

6/35

AN628 APPLICATION NOTE

Pin 3. OVP (Overvoltage protection input). A comparator with a precise 5.1V reference voltage and 250mV of
hysteresis, detects the overvoltage condition and turns the controller in stand-by condition (with low power con­sumption) and discharges the soft start capacitor. This pin (see fig. 7) has to be externally connected with a
resistive divider (Ra and Rb) to the D.C. output voltage. The divider ratio is defined by the relation:

∆V

+

V

where:

∆

Figure 7.

V

is the output overvoltage limit.

OUT

Ra

------- -

Rb

O

--------------------------------- 1–=

OUT

5.1V

Pin 4.

IAC (A.C. current input). This pin (see fig. 8) has to be connected through a resistor to the rectified line
voltage to drive the multiplier with a current (II

The relation between the input alternate current (I

) proportional to the instantaneous line voltage:

AC

V

I

IAC

IAC

I

--------- -=

R

ac

) and the output current (programming signal Imult) of the

multiplier is described at MULT-OUT section (pin8).

Figure 8.

Pin 5.CA-OUT (Current amplifier output). The CA_OUT deliveres its signal to the PWM comparator. An external
network (see fig. 9) defines the suitable loop gain to process the multiplier output and the line current signals.
To avoid oscillation problem (see fig. 10) the maximum inductor current downslope (VO/L) has to be lower than
oscillator ramp-slope (V

srp

· fsw):

V

O

------- -

R

sGcaVsrpfsw

L

⋅≤⋅⋅

7/35

AN628 APPLICATION NOTE

where:

V

is the oscillator ramp peak-peak voltage.

srp

G

is the current amplifier gain.

ca

is the switching frequency.

f

sw

and rewritten as:

Figure 9.

G

ca

V

srpfsw

------------------------------- -

≤

V

⋅

ORs

L⋅⋅

OSC

Figure 10.

Ri' Ri

Rs

Rf

+
C/A

-

PWM

598

CA OUT

Cf

D94IN063

R

f

defines the high frequency C/A gain (1 + ):

-----

R

i

R

-----

R

f

i

V

srpfsw

------------------------------- - 1–≤

V

ORS

L⋅⋅

⋅

To define the Cf value, it's useful to consider the current openloop gain, defined by the ratio between the voltage
across Rs and the current amplifier output signal:

v

rs

--------=

v

ca

8/35

G

avg

Because, in worst condition is:

AN628 APPLICATION NOTE

RsVO⋅

------------------ -=

v

rs

sL⋅

and the total variation of v

(the reference signal for PWM) is V

ca

srp

RsVO⋅

Multiplying this G

G

avg

by Gca and solving for the crossover frequency (f = fc), follows:

avg

------------------------------------ -=

2π fL⋅⋅⋅

V

srp

f

sw

------- -=

f

c

2π

To ensure a phase margin (higher than 45°), the zero frequency (f

f

---------- -

z

4 π⋅

Figure 11.

Gain [dB]
100

80

Gca

60

40

20

Gavg

0

-20

-40

-60
10 100 1000 10000 100000

Gloop

f [Hz]

f

sw

1

-------------------------------

2 π C

⋅⋅ ⋅

fRf

C

⇒

Figure 12a.

~

To avoid line current distorsion, the rectified mains
ripple (2f) level has to be reduced. A two pole filter,
with three resistors and two capacitors, setting the
lowest pole at 2Hz and the highest one at 13Hz, is
enough to get the useful voltage level reducing to ­80dB the 100Hz gain.

:

f

c

) should be about , than:

z

2

------------------== =

f

R

⋅

ffsw

R

R

A

B

C

C

A

B

--- -

2

VRMS

7

R

C

D94IN064

2

1/V

Pin 6.

LFF (Load feed-forward input). This voltage in­put pin allows to modify the multiplier output current
proportionally to the load in order to improve the re­sponse time versus load transient. The control is
working with V

between 1.5V and 5.1V. If this

LFF

function is not used, the LFF pin has to be connected
to VREF pin.See also appendix A.

Pin 7.

VRMS. Input to the divider (1/V

2

RMS

), it is es­pecially useful in universal mains applications to
compensate the gain variation related to the input
voltage change. It will be connected to an external
network (see fig. 12a) giving a voltage level propor­tional to the mains V
using a V

voltage level in the range between 1.5V

RMS

. The best control is reached

RMS

and 5.5V.

Figure 12b.

The signal (pin 7), with the network in fig. 12a is:

9/35

AN628 APPLICATION NOTE

V

= 85V (110V -20%) VRM(7) = 1.6V

RMS

V

= 260V (220V +20%) VRM(7) = 5V

RMS

Gain at 2f(100Hz) -80dB

Pin 8.

MULT-OUT (Output of the multiplier). This pin deliveres the programming current (Imult) according to the

relation:

V

va out–

---------------------------------------------------------------------------------------------------------- -

IAC

where: V

V

V

I

I

mult

= E/A output voltage range

VA-OUT

= voltage input at pin 6

LFF

= voltage input at pin 7

RMS

= input current at pin 4

IAC

0.37 I

⋅⋅=

To optimize the multiplier biasing for each application, the relation between Imult and the other input signals to
the multiplier are here reported (refer to figure 13 and see figures 13a to 13h).

Figure 13.

1.28V–()0.8 V

2

V

RMS

LFF

1.28V–⋅()⋅

Figure 13a. MULTI-OUT vs. IAC (V

V

= 5.1V)

LFF

10/35

RMS

= 1.7V;

Figure 13b. MULTI-OUT vs. I

V

= 5.1V)

LFF

AC

(V

RMS

= 2.2V;

AN628 APPLICATION NOTE

Figure 13c. MULTI-OUT vs. IAC (V

= 5.1V)

V

LFF

Figure 13d. MULTI-OUT vs. I

V

= 5.1V)

LFF

AC

(V

RMS

RMS

= 4.4V;

= 5.3V;

Figure 13f. MULTI-OUT vs. I

= 2.5V)

V

LFF

Figure 13g. MULTI-OUT vs. I

V

= 2.5V)

LFF

AC

AC

(V

(V

RMS

RMS

= 2.2V;

= 4.4V;

Figure 13e. MULTI-OUT vs. I

= 2.5V)

V

LFF

AC

(V

RMS

= 1.7V;

Figure 13h. MULTI-OUT vs. I

V

= 2.5V)

LFF

AC

(V

RMS

= 5.3V;

11/35