ST AN432 Application note

AN432

APPLICATION NOTE

USING ST62xx I/O PORTS SAFELY

by J.Stockinger

INTRODUCTION

All members of the ST62 Series of Microcontrollers from STMicroelectronics feature I/O ports with configurable bit functions. In addition many I/O bits may be set as inputs to the on-chip Analog to Digital Converter. This port bit function is in addition to the normal I/O functions of input (with or without internal pull-up resistor), output (open drain or push-pull) or edge/level selectable interrupt input (with pull-up). This flexibility makes the ST62 series suitable for many industrial control applications (and for many other uses).

This application note explains the architecture of the I/O bit associated with these port functions and provides some indications on the correct use of these features for functions such as keyboard scanning and analog inputs. The correct manner to switch between these function is also demonstrated in order to prevent potential malfunctions in operation.

Rev. 1.1

AN432/1203

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USING ST62xx I/O PORTS SAFELY

1 I/O PORT STRUCTURE

The ST62 I/O Port with Analog Input (hereafter referred to as I/O port) is comprised of 8 identical bit structures as shown in Figure 1. These include the interface to the ST62 internal databus and the three registers selecting the programmable options. I/O Ports without the analog capability are identical with the exception of the analog input buffer and control logic.

The control registers are named the Data Register (DR), the Data Direction Register (DDR) and the Option Register (OR). The DDR and OR are accessed directly at their addresses for read and write cycles i.e. data is written to the register and can be read from the register. The OR Register has a different operation and care must be taken when reading and writing to this register.

Figure 1. ST62XX I/O port structure with A/D input

Note: The control registers are located in the ST62 Dataspace, please refer to the individual device datasheets for the specific addresses for the I/O ports with analog capability.

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			USING ST62xx I/O PORTS SAFELY
Figure 2. Data register access			Figure 3. Read multiplexing
Table 1. Input and output modes of an I/O cell
DDR	OR	DR	I/O pin input/output modes
0	0	0	input with pull-up
0	0	1	input no pull-up
0	1	0	interrupt input with pull-up
0	1	1	analog input
1	0	DR	open drain output
1	1	DR	push-pull output

For most microcontrollers which use programmable flexibility for I/O pins, it has been common, to reduce the number of registers, to use the data register address for 3 purposes:

–writing to the DR

–reading the DR content

–reading the state of the I/O pin.

With this convention, the data read from the DR register may come from two different sources, the DR output and the I/O pin. The source is selected by a multiplexer controlled by the state of the DDR.

If the DDR bit corresponding to the I/O pin contains a “1", the port pin is set to output. Subsequent read accesses to DR will return the content of the DR.

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USING ST62xx I/O PORTS SAFELY

If the DDR bit corresponding to the I/O pin contains a “0", the port pin is set to input. Subsequent read accesses to DR will return the state of the I/O pin. This means that the DR bit is effectively Read Only when the bit is in Output mode. To read the content of any DR bit set to input mode a copy of the DR content previously written must be saved in Data RAM.

Writing to the DR bit is possible in both input and output modes. It is important to note this as in input mode, DR is used to set the input pin characteristics (table 1). Due to the flexibility of programming each I/O bit individually, some pins of a port may be configured to input mode and others to output mode. Reading the DR will return some DR bit contents (from pins in output mode) and some I/O pin states (from pins in input mode) combined in the one byte. As will be shown in a following section this can create serious system malfunctions if care is not taken.

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