ST AN420 Application note

Expanding A/D resolution of the ST6 A/D converter

1 Introduction

Occasionally the analog signal provided by external sensors require an Analog to Digital conversion with a resolution of greater than 8 bits. In order to extract the full information for subsequent data processing within the microcontroller a higher resolution Analog to Digital is thus required.

The solution described in this note enables this higher resolution with the on-chip 8-bit A/D converter of the ST62, using only an additional Operational Amplifier (OpAmp) and a few resistors

AN420

Application note

November 2011 Doc ID 2078 Rev 2 1/15

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Contents AN420

Contents

1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

2 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 Principle of operation of an algebraic adder . . . . . . . . . . . . . . . . . . . . . 5

4 Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

5 Application example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2/15 Doc ID 2078 Rev 2

AN420 List of figures

List of figures

Figure 1. Example circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Figure 2. Generic algebraic adder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 3. Conversion routine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 4. Example circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Doc ID 2078 Rev 2 3/15

Overview AN420

PC4

PC5

PC6

ST6215

PB0 (A/D Input)

Vin

OUTPUTS

-36

2 Overview

The technique implemented is that of the Algebraic Adder, a full discussion of the principle of operation is included in this note.

A practical example of the external components used is shown in the following figure:

Figure 1. Example circuit

The resistances are selected by the ST62 I/O pins depending on the analog input voltage.

The selection programmed modifies the output voltage of the OpAmp in such a way that the following A/D conversion is always made with the maximum input range of the converter.

This selection is made by software, therefore the total conversion time is increased versus a normal 8-Bit conversion, however the precision is increased and the input voltage range can be enlarged.

4/15 Doc ID 2078 Rev 2

AN420 Principle of operation of an algebraic adder

VNn

RNn

RrRN2

VN2

VN1

RN1

RN0

RP1

RP2

VP2

VP1

VPm

RPm

RP0

-36

i1=

∑

i1=

∑

×–×=

----- -

---------

--------

j1=

∑

---------

--------

i1=

∑

-------==

3 Principle of operation of an algebraic adder

Figure 2 represents the generic algebraic adder.

Figure 2. Generic algebraic adder

The circuit generates an output voltage equal to: i

To minimize the effects of the input polarizing currents, the total resistances seen from the two inputs of the OpAmp should be the same. Therefore:

The two resistances RP0 and RN0 are needed to satisfy the above relation. In general, only one of them will be needed.

(1)

(2)

Doc ID 2078 Rev 2 5/15

Principle of operation of an algebraic adder AN420

i1=

∑

i1=

∑

----------------------------------=

------=

V0G

j1=

∑

+×

--------------------------------------------- -=

j1=

∑

++ G

j1=

∑

+ G

j1=

∑

–

-------- V

i1=

∑

--------

×+×=

--------=

To analyze the circuit, let us calculate the input voltages:

(3)

where

(4)

Relation (2) becomes:

(5)

From 3, 4 and 5 we get:

(6)

Relation (6) is the relevant formula to be used. It also explains the name given to this circuit, since the output voltage is the 'algebraic sum' of the input voltages. To design the actual circuit, you chose one value of Rr (arbitrarily). The other resistances are then determined by the desired coefficients:

(7)

6/15 Doc ID 2078 Rev 2

AN420 Principle of operation of an algebraic adder

Finally, the values for RN0 and RP0 are chosen, based on (2).

Doc ID 2078 Rev 2 7/15

Example AN420

4 Example

Let us assume we have a voltage swing of 10 volts (0 to 10) that we want to convert with a 10-bit resolution. And let us assume we have a set of voltage sources VNj that we can switch between 0 to 5 volts under software control, and each one independently from the other.

Let us also assume we can 'cut' the 10 volt swing in 4 'pieces' of 2.5 volts each, and that every 'piece' can be converted with 8-bit resolution. The overall resolution will therefore be:

(ST6 A/D resolution)

* 22

(# of 'pieces')

Let us call Vin the actual value of the source to be converted. For instance, if Vin ε [10, 7,5] volts, we could supply the ST6 A/D with the voltage:

-7.5volt)x2 => ε[0,5]volt

or, for (10,7.5) volts:

-1.5xVN1)x2 = 2xVin-3xV

where VN1 is one of the VNj sources, either 0 or 5 volts. In similar fashion, for the other intervals, we could obtain:

(7.5, 5) volts

)x2 = 2xVin-2xV

in-VN2

(5, 2.5) volts

-0.5xVN3)x2 = 2xVin-V

(2.5, 0) volts

-0xVN4)x2 = 2xV

So, relation (6) becomes:

= 2xVin-3xVN1-2xVN2-VN3 where Vin =V

The software driving the conversion will therefore verify if, given a certain status of the V voltages, the conversion is far from being saturated. If so, another try will be performed with a different status of the V

voltages. Figure 3 gives the flow chart of such software.

= 2

8/15 Doc ID 2078 Rev 2

AN420 Example

VN1 = VN2 = VN3 = 0

CONVERT

SATURATED?

DONE

Vin => [0, 2.5] V

CONVERT

VN3 = 1

YES

SATURATED?

DONE

Vin => [2.5, 5] V

CONVERT

YES

SATURATED?

DONE

VN3 = 0, VN2 = 1

Vin => [5, 7.5] V

YES

CONVERT

VN2 = 0, VN1 = 1

DONE

Vin => [7.5, 10] V

-36

---------- 2R

⇒ 5000Ω==

---------- 3R

⇒ 3333Ω==

---------- 2R

⇒ 5000Ω==

Figure 3. Conversion routine

The actual circuit values are calculated as follows. With arbitrarily chosen Rr equal to 10 KΩ, the other resistor values are given by:

Doc ID 2078 Rev 2 9/15

Example AN420

---------- 1R

⇒ 10Ω==

----- -

----------

---------- 0.0007++++++

----------

----------+

--------- - 0.0002+=

---------- 0.0007+

---------- 0.0002+=

------- ∞ R

⇒ 2KΩ==

To satisfy relation (2), we obtain the following values, as indicated in Figure 4.

Assuming

10/15 Doc ID 2078 Rev 2

AN420 Application example

PC4

3.3K

10K

PC5

PC6

ST6215

PB0 (A/D Input)

Vin

OUTPUTS

-36

5 Application example

An example ST62 software program follows on the next pages. It executes the program flow

of Figure 3 in the application circuit of Figure 4.

Figure 4. Example circuit

The ST6215 pin allocation is arbitrary. The three outputs can drive other identical circuits, when more the one 10-bit A/D channel is needed. Also, a different number of 'pieces' can be used to achieve a different resolution.

;***********************************************************************************

;* File name: HIRES_AD.ASM

;* ALGEBRAIC ADDER AND ST6 A/D CONVERTERS - Application note software

;* This software is an example on how to increase the ST6 converter

;* resolution. Please refer to the application note for further

;* explanations.

;* Allocation of pins: PC4, PC5 and PC6 are, respectively, voltage sources

;* VN1, VN2 and VN3. PB0 is an A/D input

;***********************************************************************************

.input "6215_reg.asm" ;ST6215 standard definitions file

VN1 .equ 4 ;PC4 bit select

VN2 .equ 5 ;PC5 bit select

VN3 .equ 6 ;PC6 bit select

drcs .def 0bfh,0ffh,0ffh ;shadow register for Data Register C

Doc ID 2078 Rev 2 11/15

Application example AN420

Hres .def 0bdh,0ffh,0ffh ;MS 2 bits of conversion result, and

conv_f .equ 7;the MSB of Hres is the high resolution

c1 .equ 6 ;conversion step flags

c2 .equ 5

c3 .equ 4

c4 .equ 3 ;using Hres

Lres .def 0beh,0ffh,0ffh ;LSB of conversion result

;************************** N O T E ***********************************************

;register W is used to save the accumulator contents

;in standard interrupt routines

;********************************************************************************

.org 880h ;one module only. Do not use this

init ldi drb,1

ldi orb,1 ;PB0 is analog input

ldi ddrc,070h ;PC4..6 are open drain outputs

ldi orc,070h ;PC4..6 are push-pull outputs now

ldi drcs,0 ;assume PC7 is input with pull-up,

ldi ior,10h ;enable interrupts

ldi Hres,0

reti ;initialize interrupt machine

conv ;this is an endless loop converting

set conv_f,Hres

set c1,Hres

set 5,adcr ;start high resolution conversion

jrs conv_f,Hres,$

nop ;here the high resolution result is

jp conv

adcint

ld w,a ;save accumulator

ld a,adr ;in accumulator conversion result

jrs c1,Hres,c1conv

;conversion flag

;end of conversion flag

;assembly directive if you organize

;your software in linkable modules

;no interrupt

;PB0 input with 10-bit resolution

;the first time here after reset,

;VN1=VN2=VN3=0

;available in Hres-Lres

12/15 Doc ID 2078 Rev 2

AN420 Application example

jrs c2,Hres,c2conv

jrs c3,Hres,c3conv

c4conv ldi Hres,3

ld Lres,a

ld a,drcs

res VN1,a

ld drcs,a

ld drc,a ;VN1=VN2=VN3=0

jp convout

c1conv pi a,0ffh

jrnz c1c1

lr Hres

ld Lres,a

convout d a,w

reti

c1c1 ld a,drcs

set VN3,a

ld drcs,a

ld drc,a ;VN1=VN2=0, VN3=1

set 5,adcr ;start conversion

res c1,Hres

set c2,Hres

jp convout ;exit interrupt

c2conv cpi a,0ffh

jrnz c2c1

ldi Hres,1

ld Lres,a

jp convout

c2c1 ld a,drcs

res VN3,a

set VN2,a

ld drcs,a

ld drc,a ;VN1=VN3=0, VN2=1

set 5,adcr ;start conversion

res c2,Hres

set c3,Hres

jp convout ;exit interrupt

c3conv cpi a,0ffh

jrnz c3c1

Doc ID 2078 Rev 2 13/15

Application example AN420

ldi Hres,2

ld Lres,a

jp convout

c3c1 ld a,drcs

res VN2,a

set VN1,a

ld drcs,a

ld drc,a ;VN2=VN3=0, VN1=1

set 5,adcr ;start conversion

res c3,Hres

set c4,Hres

jp convout ;exit interrupt

.org 0ff0h

jp adcint ;A/D interrupt vector

.org 0ffeh

jp init ;reset vector

.end

14/15 Doc ID 2078 Rev 2

AN420 Revision history

6 Revision history

Table 1. Document revision history

Date Revision Changes

21-Dec-1992 1 Initial release.

02-Nov-2011 2 Updated format and company logo.

Doc ID 2078 Rev 2 15/15

AN420

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Doc ID 2078 Rev 2 15/15

ST AN420 Application note

Specifications and Main Features

Frequently Asked Questions

User Manual

1 Introduction

2 Overview

Figure 1. Example circuit

3 Principle of operation of an algebraic adder

Figure 2. Generic algebraic adder

4 Example

Figure 3. Conversion routine

5 Application example

Figure 4. Example circuit

6 Revision history

Table 1. Document revision history