AN4044
Application note
Using floating-point unit (FPU) with STM32F405/07xx and STM32F415/417xx microcontrollers
Introduction
This application note explains how to use floating-point units (FPU) with STM32F405/07xx and STM32F415/417xx microcontrollers and provides a short overview of:
■Floating-point arithmetic
■STM32F405/07xx and STM32F415/417xx family floating-point unit
An application example is given at the end of this application note.
Table 1 lists the microcontrollers and development tools concerned by this application note.
Type |
Applicable products |
Microcontrollers
STM32F405/07xx and STM32F415/417xx high-performance MCUs with
DSP and FPU instructions
Development tools |
STM3240G-EVAL evaluation board |
March 2012 |
Doc ID 022737 Rev 1 |
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www.st.com
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Contents
1 |
Floating-point arithmetic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
5 |
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1.1 |
Fixed-point or floating-point . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
5 |
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1.2 |
Floating-point unit (FPU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
6 |
2 |
IEEE standard for floating-point arithmetic (IEEE 754) . . . . . . . . . . . . . |
7 |
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2.1 |
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
7 |
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2.2 |
Number formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
7 |
2.2.1 Normalized numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2.2 Denormalized numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2.3 Zeros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2.4 Infinites . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2.5 NaN (Not-a-Number) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2.6 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Rounding modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.4 Arithmetic operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.5 Number conversions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.6 Exception and exception handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.7 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3 |
STM32F4 floating-point unit (FPU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
12 |
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3.1 |
Special operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
12 |
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3.2 |
Floating-point status and control register (FPSCR) . . . . . . . . . . . . . . . . . |
12 |
3.2.1 Code condition bits: N, Z, C, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.2.2 Mode bits: AHP, DN, FZ, RM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.2.3 Exception flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.3 Exception management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.4 Programmers model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.5 FPU instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.5.1 FPU arithmetic instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.5.2 FPU compare & convert instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.5.3 FPU load/store instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4 |
Application example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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4.1 |
Julia set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . 15 |
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4.2 |
Implementation on STM32F4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . 16 |
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4.3 |
Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . 17 |
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4.4 |
Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . 18 |
5 |
Reference documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . 19 |
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6 |
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . 20 |
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List of tables |
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List of tables
Table 1. Applicable products and tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Integer numbers dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 3. Floating-point numbers dynamic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 4. Normalized numbers range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 5. Denormalized numbers range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 6. Value range for IEEE.754 number formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 7. FPSCR register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 8. Performance comparison with MDK-ARM version 4.22 . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 9. Reference documents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 10. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
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Floating-point arithmetic |
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Floating-point numbers are used to represent non-integer numbers. They are composed of 3 fields:
●the sign
●the exponent
●the mantissa
Such a representation allows a very wide range of number coding, making floating-point numbers the best way to deal with real numbers. Floating-point calculations can be accelerated using a Floating-point unit (FPU) integrated in the processor.
1.1Fixed-point or floating-point
One alternative to floating-point is fixed-point, where the exponent field is fixed. But if fixedpoint is giving better calculation speed on FPUless processors, the range of numbers and their dynamic is low. As a consequence, a developer using the fixed-point technique will have to check carefully any scaling/saturation issues in its algorithm.
Table 2. |
Integer numbers dynamic |
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Coding |
Dynamic |
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Int8 |
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48 dB |
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Int16 |
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96 dB |
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Int32 |
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192 dB |
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Int64 |
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385 dB |
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The C language offers the float and the double types for floating-point operations. At a higher level, modelization tools, such as matlab or scilab, are generating C code mainly using float or double. No floating-point support means modifying the generated code to adapt it to fixed-point. And all the fixed-point operations have to be handcoded by the programmer.
Table 3. |
Floating-point numbers dynamic |
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Coding |
Dynamic |
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half precision |
180 dB |
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single precision |
1529 dB |
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double precision |
12318 dB |
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When used natively in code, floating-point operations will decrease the development time of a project. It is the most efficient way to implement any mathematical algorithm.
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Floating-point arithmetic |
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1.2Floating-point unit (FPU)
Floating-point calculations require a lot of resources, as for any operation between two numbers. For example, we need to:
●align the two numbers (have them with the same exponent)
●perform the operation
●round out the result
●code the result
On an FPUless processor, all these operations are done by software through the C compiler library and are not visible to the programmer; but the performances are very low.
On a processor having an FPU, all of the operations are entirely done by hardware in a single cycle, for most of the instructions. The C compiler does not use its own floating-point library but directly generates FPU native instructions.
When implementing a mathematical algorithm on a microprocessor having an FPU, the programmer does not have to choose between performance and development time. The FPU brings reliability allowing to use directly any generated code through a high level tool, such as matlab or scilab, with the highest level of performance.
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IEEE standard for floating-point arithmetic (IEEE 754) |
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The usage of the floating-point arithmetic has always been a need in computer science since the early ages. At the end of the 30’s, when Konrad Zuse developed his Z series in Germany, floating-points were already in. But the complexity of implementing a hardware support for the floating-point arithmetic has discarded its usage for decades.
In the mid 50’s, IBM, with its 704, introduced the FPU in mainframes; and in the 70’s, various platforms were supporting floating-point operations but with their own coding techniques. The unification took place in 1985 when the IEEE published the standard 754 to define a common approach for floating-point arithmetic support.
The various types of floating-point implementations over the years led the IEEE to standardize the following elements:
●arithmetic operations
●number conversions
●special values coding
●4 rounding modes
●5 exceptions and their handling
2.2Number formats
All values are composed of three fields:
●Sign: s
●Biased exponent:
–sum of the exponent = e
–constant value = bias
●Fraction (or mantissa): f
The values can be coded on various lengths:
●16-bit: half precision format
●32-bit: single precision format
●64-bit: double precision format
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