ST AN4013 APPLICATION NOTE
AN4013
Application note
STM32F1xx, STM32F2xx, STM32F4xx, STM32L1xx timer overview
1 Introduction
This document:
● presents an overview of the timer peripherals in the STM32F1xx, STM32F2xx,
STM32F4xx and STM32L1xx microcontroller families,
● describes the various modes and specific features of the timers, such as clock sources,
● explains how to use the available modes and features,
● explains how to compute the time base in each configuration,
● describes the timer synchronization sequences and the advanced features for motor
control applications, in addition to the basic timer modes.
For each mode, typical configurations are presented and examples of how to use the modes
are provided.
In the rest of this document (unless otherwise specified), the term STM32xx is used to refer
to STM32F1xx, STM32F2xx, STM32F4xx and STM32L1xx microcontroller families.
February 2012 Doc ID 022500 Rev 1 1/27
www.st.com
Contents AN4013
Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3 Basic timer modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1 Clock input sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1.1 Internal clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1.2 External clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2 Time base generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.3 Timer input capture mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.4 Timer output compare mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.5 Timer PWM mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.6 Timer one pulse mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4 Timer synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.1 Timer system link . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.2 Master configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.3 Slave configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5 Advanced features for motor control . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.1 Signal generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.2 Specific features for motor control applications . . . . . . . . . . . . . . . . . . . . 18
5.2.1 Complementary signal and dead time feature . . . . . . . . . . . . . . . . . . . . 18
5.2.2 Break input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.2.3 Locking mechanism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.2.4 Specific features for feedback measurement . . . . . . . . . . . . . . . . . . . . . 20
6 Specific applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.1 Infrared application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.2 3-phase AC and PMSM control motor . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.3 Six-step mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
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AN4013 Overview
2 Overview
STM32 devices use various types of timers, with the following features for each:
● General purpose timers are used in any application for output compare (timing and
delay generation), one-pulse mode, input capture (for external signal frequency
measurement), sensor interface (encoder, hall sensor)...
● Advanced timers: these timers have the most features. In addition to general purpose
functions, they include several features related to motor control and digital power
conversion applications: three complementary signals with deadtime insertion,
emergency shut-down input.
● One or two channel timers: used as general purpose timers with a limited number of
channels.
● One or two channel timers with complementary output: same as previous type, but
having a deadtime generator on one channel. This allows having complementary
signals with a time base independent from the advanced timers.
● Basic timers have no input/outputs and are used either as timebase timers or for
triggering the DAC peripheral.
Ta bl e 1 summarizes the STM32 family timers.
Ta bl e 2 presents a general overview of timer features.
Doc ID 022500 Rev 1 3/27
Overview AN4013
Table 1. STM32 family timers
STM32F101/102/
Timer type
103/105/107
families
TIM1 TIM1
Advanced
TIM8
TIM2 TIM2 TIM2
TIM3 TIM3 TIM3 TIM3
16-bit
General
purpose
TIM4 TIM4 TIM4 TIM4
TIM5 TIM5
32-bit
TIM6 TIM6 TIM6 TIM6
Basic
TIM7 TIM7 TIM7 TIM7
TIM10
TIM11
1-channel
TIM13 TIM13
TIM14 TIM14
TIM9
2-channel
TIM12 TIM12
1-channel with one
complementary output
STM32F100
family
TIM15
STM32L1
family
STM32F2 and
STM32F4
families
TIM1
TIM8
TIM2
TIM5
TIM10 TIM10
TIM11 TIM11
TIM13
TIM14
TIM9 TIM9
TIM12
2-channel with one
complementary output
TIM16
TIM17
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AN4013 Overview
Table 2. Timer features overview
Synchronization
Timer type
Counter
resolution
Advanced 16 bit
General purpose
16 bit
32 bit
Counter type DMA Channels
(1)
up, down and
center aligned
up, down and
center aligned
Ye s 4 3 Ye s Ye s
Ye s 4 0 Ye s Ye s
Comp.
channels
Master
config.
Slave
config.
Basic 16 bit up Yes 0 0 Yes No
1-channel 16 bit up No 1 0
Ye s ( O C
signal)
No
2-channel 16 bit up No 2 0 Yes Yes
1-channel with one
complementary
output
16 bit up Yes 1 1
Ye s ( O C
signal)
No
2-channel with one
complementary
16 bit up Yes 2 1 No Yes
output
1. TIM2 and TIM5 are 32-bit counter resolution in the STM32F2 and STM32F4 families.
Doc ID 022500 Rev 1 5/27
Basic timer modes AN4013
3 Basic timer modes
Basic timers can be programmed to work in one of the following configurations.
3.1 Clock input sources
The timer can be synchronized by several clocks simultaneously:
● Internal clock
● External clock
– External mode1 (TI1 or TI2 pins)
– External clock mode2 (ETR pin)
– Internal trigger clock (ITRx)
3.1.1 Internal clock
The timer is clocked by default by the internal clock provided from the RCC. To select this
clock source, the SMCR_SMS (if present) bits should be reset.
3.1.2 External clock
The external clock timer is divided in two categories:
● External clock connected to TI1 or TI2 pins
● External clock connected to ETR pin
In these cases, the clock is provided by an external signal connected to TIx pins or ETR pin.
The maximum external clock frequency should be verified.
Note: 1 In addition to all these clock sources, the timer should be clocked with the APBx clock.
2 The external clocks are not directly feeding the prescaler, but they are first synchronized
with the APBx clock through dedicated logical blocks.
External clock mode1 (TI1 or TI2 pins)
In this mode the external clock will be applied on timer input TI1 pin or TI2 pin. To do this:
1. Configure the timers to use the TIx pin as input:
a) Select the pin to be used by writing CCxS bits in the TIMx_CCMR1 register.
b) Select the polarity of the input:
For the STM32F10x family: by writing CCxP in the TIMx_CCER register to select
the rising or the falling edge;
For the STM32L1x, STM32F2xx or STM32F4xx: by writing CCxP and CCxNP in
the TIMx_CCER register to select the rising/falling edge, or both edges
(a)
.
a. For the STM32F10x family, polarity selection for both edges can be achieved by using
TI1F_ED, but only for TI1 input.
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AN4013 Basic timer modes
c) Configure the filter and the prescaler if needed by writing the ICxF[3:0] bits in the
TIMx_CCMR1:
Select the timer TIx as the trigger input source by writing TS bits in the
TIMx_SMCR register.
Select the external clock mode1 by writing SMS=111 in the TIMx_SMCR register.
Enable the corresponding channel by setting the CCEx bit in the TIMx_CCER
register.
2. Select the timer TIx as the trigger input source by writing TS bits in the TIMx_SMCR
register.
3. Select the external clock mode1 by writing SMS=111 in the TIMx_SMCR register.
External clock mode2 (ETR pin)
The external clock mode2 uses the ETR pin as timer input clock. To use this feature:
1. Select the external clock mode2 by writing ECE = 1 in the TIMx_SMCR register.
2. Configure, if needed, the prescaler, the filter and the polarity by writing ETPS [1:0], ETF
[3:0] and ETP in the TIMx_SMCR register.
Internal trigger clock (ITRx)
This is a particular mode of timer synchronization. When using one timer as a prescaler for
another timer, the first timer update event or output compare signal is used as a clock for the
second one.
3.2 Time base generator
The timer can be used as a time base generator. Depending on the clock, prescaler and
autoreload, repetition counter (if present) parameters, the 16-bit timer can generate an
update event from a nanosecond to a few minutes. For the 32-bit timer, the range is larger.
Example update event period
The update event period is calculated as follows:
Update_event = TIM_CLK/((PSC + 1)*(ARR + 1)*(RCR + 1))
Where: TIM_CLK = timer clock input
PSC = 16-bit prescaler register
ARR = 16/32-bit Autoreload register
RCR = 16-bit repetition counter
TIM_CLK = 72 MHz
Prescaler = 1
Auto reload = 65535
No repetition counter RCR = 0
Update_event = 72*106/((1 + 1)*(65535 + 1)*(1))
Update_event = 549.3 Hz
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Basic timer modes AN4013
Example external clock mode2
In this mode, the update event period is calculated as follows:
Update_event = ETR_CLK/((ETR_PSC)*(PSC + 1)*(ARR + 1)*(RCR + 1))
Where ETR_CLK = the external clock frequency connected to ETR pin.
ETR_CLK = 100 kHz
Prescaler = 1
ETR_PSC = 2
Autoreload = 255
Repetition counter = 2
Update_event= 100*103/((2 + 1)* (1+ 1)*((255 + 1)*(2 + 1))
Update_event = 21.7 Hz
Example external clock mode1
In this mode, the update event period is calculated as follows:
Update_event = TIx_CLK/((PSC + 1)*(ARR + 1)*(RCR +1))
Where TIx_CLK = the external clock frequency connected to TI1 pin or TI2 pin.
TIx_CLK = 50 kHz
Prescaler = 1
Auto reload = 255
Repetition counter = 2
Update_event = 50 000/((1+ 1)*((255 + 1)*(2 + 1))
Update_event = 32.55 Hz
Example Internal trigger clock (ITRx) mode1
In this mode, the update event period is calculated as follows:
Update_event = ITRx_CLK/((PSC + 1)*(ARR + 1)*(RCR + 1))
Where ITRx_CLK = the internal trigger frequency mapped to timer trigger input (TRGI)
ITRx_CLK = 8 kHz
Prescaler = 1
Auto reload = 255
Repetition counter = 1
Update_event = 8000/((1+ 1)*((255 + 1)*(1 + 1))
Update_event = 7.8 Hz
Depending on the counter mode, the update event is generated each:
● Overflow, if up counting mode is used: the DIR bit is reset in TIMx_CR1 register
● Underflow, if down counting mode is used: the DIR bit is set in TIMx_CR1 register
● Overflow and underflow, if center aligned mode is used: the CMS bits are different from
zero.
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AN4013 Basic timer modes
The update event is generated also by:
● Software, if the UG (update generation) bit is set in TIM_EGR register.
● Update generation through the slave mode controller
As the buffered registers (ARR, PSC, CCRx) need an update event to be loaded with their
preload values, set the URS (Update Request Source) to 1 to avoid the update flag each
time these values are loaded. In this case, the update event is only generated if the counter
overflow/underflow occurs.
The update event can be also disabled by setting the bit UDIS (update disable) in the CR1
register. In this case, the update event is not generated, and shadow registers (ARR, PSC,
CCRx) keep their value. The counter and the prescaler are reinitialized if the UG bit is set, or
if a hardware reset is received from the slave mode controller.
An interrupt or/ and a DMA request can be generated when the UIE bit or/and UDE bit are
set in the DIER register.
For more details on using the timer in this mode, refer to the examples provided in the
STM32xx standard peripheral libraries in the /Project/STM32xx_StdPeriph_Examples/
TIM/TimeBase folder.
3.3 Timer input capture mode
The timer can be used in input capture mode to measure an external signal. Depending on
timer clock, prescaler and timer resolution, the maximum measured period is deduced.
To use the timer in this mode:
1. Select the active input by setting the CCxS bits in CCMRx register. These bits should
be different from zero, otherwise the CCRx register will be read only.
2. Program the filter by writing the IC1F[3:0] bits in the CCMRx register, and the prescaler
by writing the IC1PSC[1:0] if needed.
3. Program the polarity by writing the CCxNP/CCxP bits to select between rising, falling or
both edges.
The input capture module is used to capture the value of the counter after a transition is
detected by the corresponding input channel. To get the external signal period, two
consecutive captures are needed. The period is calculated by subtracting these two values.
Period = Capture(1) /(TIMx_CLK *(PSC+1)*(ICxPSC)*polarity_index(2))
The capture difference between two consecutive captures CCRx_tn and CCRx_tn+1:
● If CCRx_tn < CCRx_tn+1: capture = CCRx_tn+1 - CCRx_tn
● If CCRx_tn > CCRx_tn+1: capture = (ARR_max - CCRx_tn) + CCRx_tn+1
The polarity index is 1 if the rising or falling edge is used, and 2 if both edges are used.
Particular case
To facilitate the input capture measurement, the timer counter is reset after each rising edge
detected on the timer input channel by:
● selecting TIxFPx as the input trigger by setting the TS bits in the SMCR register
● selecting the reset mode as the slave mode by configuring the SMS bits in the SMCR
register
Doc ID 022500 Rev 1 9/27
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