ST AN3276 Application note

AN3276

Application note

ST solution for efficiency improvement in PFC applications,

back current circuit (BC

Introduction

The challenges for modern high efficiency switching power supplies are to minimize power losses and increase their power density without raising the cost. The goal is to reduce both power conduction and power switching losses.

Minimization of power conduction losses is difficult to achieve without considerably affecting the cost and power density, since more material is required (bigger active and passive components). Unlike the conduction losses, it is easier to reduce the power switching losses without significantly increasing the power supply cost. There are two main ways to achieve this improvement:

■ working on the dynamic behavior of the semiconductor technologies

■ working on circuit topologies

Novel diodes using technologies such as SiC and GaN materials significantly reduce the switching losses. However, their high price makes them not so attractive for applications such as desktop server power supplies, solar inverters and µinverters.

)

The patented circuit [see Section 5: References, 1.], described in this Application note is based on the soft switching method and meets market expectations since its efficiency/cost/power, and density/EMI trade-offs are better than high voltage SiC Schottky diodes.

November 2010 Doc ID 17975 Rev 1 1/22

www.st.com

Contents AN3276

1 Existing solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.1 Diode switch-on losses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.2 Soft switch-on method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.3 Active recovery circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

1.4 Passive recovery circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2 The new ST solution - BC2: energy recovery circuit . . . . . . . . . . . . . . . 7

2.1 Concept description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Phase timing description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.2.1 Phase before t0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.2.2 Phase t0 to t1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.2.3 Phase t1 to t2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.2.4 Phase t2 to t3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.2.5 Phase t3 to t4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.2.6 Phase t

2.3 Electrical voltage stress in BC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

to t

5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

2.4 Calculation of m2 and m1 ratios . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

2.5 Calculation of L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.6 Range of products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3BC

design in 450 W PFC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.1 BC2 design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.2 BC

typical waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.3 Efficiency comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.4 Thermal measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

5 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

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AN3276 Existing solutions

1 Existing solutions

This section describes some existing areas for efficiency improvements in PFC applications.

1.1 Diode switch-on losses

Usually, in mass market applications between 200 W and 2 kW, a power factor corrector (PFC) working in continuous conduction mode (CCM) is mandatory. To improve the power converter density, the switching frequency should be increased. Nevertheless, when the switching frequency increases, power dissipation in the power switch/rectifier commutation cells leads to the major switching losses in the PFC. The main power losses occur during turn-on of the power switch due to both the voltage and current crossing area of the MOSFET and the reverse recovery losses [see Section 5: References, 2.] produced by the PN diode as shown in Figure 1.

Figure 1. Switch-on losses in PN diode behavior

I+I

RM 0

Losses are due to area between I +I and V

0RM DS

To reduce the losses of the PN rectifier, many semiconductor manufacturers have recently introduced high-voltage Schottky diodes using SiC and GaN technologies. However, it is impossible to completely remove the voltage and current crossing area during transistor turn-on by improving component performance only.

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Existing solutions AN3276

Figure 2. Switch-on losses in SiC or GaN diode behavior

Losses are due to area between I and V

0DS

Unlike PN diodes, SiC diodes allow the turn-on dI/dt to be increased without increasing the diode recovery current. Thus, switching time decreases and switch-on losses decrease too, but they are not removed entirely. Today, in PFC designs, the turn-on dI/dt with the SiC diode is around 1000 A/µs maximum to respect EMI standards, whereas the PN diode is used with a dI/dt of 300 A/µs.

1.2 Soft switch-on method

Another way to reduce these losses is to use a soft switching method by adding a small inductor L to control the dI/dt slope. This solution removes the current/voltage crossing area and the PN diode recovery current effect during the turn-on of the transistor as shown in

Figure 3.

Figure 3. Switch-on losses in current soft switching behavior

Small losses: Zero current switching

dI/dt fixed by L

I+I

RM 0

4/22 Doc ID 17975 Rev 1

AN3276 Existing solutions

This soft switching solution is well known, but it requires that several technical criteria be met:

● Reset the current in the inductor L at each switching period, whatever the variations of

the current, and input and output voltages.

● Recover the saved inductive energy without losses.

● Limit any overvoltage and overcurrent stress in the semiconductor devices.

● Keep cost down when adding any device.

● Maintain a similar power supply density.

There are many circuits that are classified in two families of recovery circuits:

● active

● passive

1.3 Active recovery circuit

In the active recovery circuit family, the zero voltage transition (ZVT) [see Section 5:

References, 3.] shown in Figure 4 is well known by designers. This circuit allows both

switch-on and switch-off power losses to be removed.

Figure 4. Zero voltage transition (ZVT) active recovery circuit

mains

ZVT

damping

OUT

A theoretical study indicates that ZVT is an excellent topology for the PFC application, since all the switch losses are removed. In addition, this circuit can work whatever the input and output power variations. Nevertheless, in practice, the recovery current from the boost diode D

significantly affects the ZVT behavior leading to some constraints on both inductance

and minimum duty cycle. During the reset current in the small inductor L, the recovery current from D

involves a high-stress voltage and damping parasitic oscillation. Finally, the

dynamic behavior of the PN diode affects the global ZVT efficiency because conduction times in the transistor should increase and a dissipative snubber is mandatory to reduce the electrical stress across the semiconductors.

In terms of cost the ZVT circuit requires an additional power MOSFET and a specific PWM controller. Several derivative circuits of the ZVT circuit have the same technical issue and their higher price makes these circuits less than ideal for mass market applications. Therefore, the passive recovery circuit can be more attractive.

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Existing solutions AN3276

1.4 Passive recovery circuit

In the passive recovery circuit family the electrical schematic shown in Figure 5 is a good example [see Section 5: References, 4.]; only two extra diodes and one resonant capacitor are required.

Figure 5. Passive recovery circuit

mains

This circuit works well under unchanging external conditions. However, it is difficult to design this kind of system in PFC applications since the current reset in the small inductor depends on both boost diode recovery current and the external electrical conditions.

Although, the non-dissipative passive circuit requires fewer components, it is unfortunately technically impractical in PFC applications. These examples highlight that the current snubber method is well known but the technical challenge is to recover the L energy through the application without affecting the five criteria listed in Section 1.2.

OUT

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AN3276 The new ST solution - BC2: energy recovery circuit

2 The new ST solution - BC2: energy recovery circuit

The innovative circuit has been designed [see Section 5: References, 1.] to respect the five soft switching criteria in Section 1.2. Figure 6 shows that two additional diodes D and two auxiliary windings N

and NS2 wound around the main boost inductor LB are

designed to reset the energy stored in the small inductor L.

and D2

Figure 6. Novel energy recovery circuit: BC

mains

2.1 Concept description

The winding N boost inductor when the transistor turns on. Since the mains input voltage modulates the L voltage, it also modulates the reflected voltage across N modulates the boost diode current I combined modulations allow the extra current I the winding N injected into the output capacitor when the transistor turns off. The reflected voltage across N

is also a function of the input voltage. This reflected voltage reaches its maximum when

the AC line voltage is low, corresponding to the maximum value of the inductor L current. These combined variations allow the current flowing in the inductor L to be cancelled in the bulk capacitor through the diode D additional windings N (about 10 A/µs) as in a discontinuous mode switching converter. Their recovery currents do not affect the behavior of the BC

allows the IRM current from the boost diode DB to be recovered in the main

even in the worst case. The winding NS2 allows the extra current of L to be

and NS2 are to switch off the diodes D1 and D2 with a low dI/dt

even in the worst case. The benefits of these two

circuit.

m2=NS2/N m1=NS1/N

and its associated recovery current IRM. These

flowing in the inductor L to be reset into

. This input voltage also

OUT

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