ST AN3261 Application note

AN3261

Application note

Dual push-button Smart Reset™ devices

with user-adjustable setup delays

Introduction

The Smart Reset™ family of devices consists of several products with a combination of
features selected to best suit most typical applications. Their basic common feature is dual­button reset with setup delay that requires both input reset buttons to be continuously
pressed for a defined period of time. This improves system stability compared to simple
manual reset button devices and eliminates the need for a traditional reset access hole (e.g.
two standard keys on the mobile phone keyboard can be used as Smart Reset™ inputs).
Numerous additional features and device options are factory-programmed or can be
implemented upon request.

Common STM65xx Smart Reset™ family features include:

■ Dual-button Smart Reset™ inputs

■ V

■ Industrial operating temperature range –40 °C to +85 °C

■ Space-saving TDFN8 package (2 mm x 2 mm x 0.75 mm)

■ RoHS compliance

range 1.0 to 5.5 V (active-low output valid)

CC

Differentiating features of the devices are:

■ With or without Power-on Reset (POR)

■ With or without V

■ Independent battery monitoring feature with battery-low warning (STM6505 only)

■ Input logic voltage levels: standard CMOS or fixed threshold

■ Smart Reset™ output characteristics

– Defined reset pulse duration or push-button controlled (undefined) reset pulse

duration
– Reset pulse duration: factory-programmed or capacitor-adjustable
– Smart Reset™ delay: tri-state / dual-state / capacitor-adjustable
– Open-drain or push-pull reset output
– Single or dual reset output

monitoring

CC

September 2010 Doc ID 17837 Rev 1 1/17

www.st.com

Contents AN3261

Contents

1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2 Typical application diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.1 Single-button reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.2 Dual-button reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.3 Multiple-button reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.4 Input pull-up considerations (CMOS/fixed levels) . . . . . . . . . . . . . . . . . . . . 9

2.5 Output pull-up considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.6 Reliability note . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3 Demonstration boards, promotion tools . . . . . . . . . . . . . . . . . . . . . . . . 11

3.1 STM6503 demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.2 STM65xx interposer boards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.3 Smartphone demonstration example . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2/17 Doc ID 17837 Rev 1

AN3261 List of figures

List of figures

Figure 1. Single-button Smart Reset™ typical application diagram, with “early-warning”

feature, STM6503 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Timing diagram - single push-button Smart Reset™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Dual push-button Smart Reset™ typical application diagram, STM6503 . . . . . . . . . . . . . . . 7

Figure 4. Timing diagram - dual push-button Smart Reset™. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 5. Three push-button delayed Smart Reset™ typical application diagram, STM6503 . . . . . . . 8

Figure 6. Timing diagram - three push-button Smart Reset™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 7. Smart Reset™ demonstration board, STM6503. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 8. The STM65xx interposer boards; a dedicated board is available for each STM65xx

Smart Reset™ device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 9. Smartphone demonstration example shows STM6503 implemented in an actual

application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 10. Smart Reset™ demonstration in an actual smartphone application. . . . . . . . . . . . . . . . . . 14

Doc ID 17837 Rev 1 3/17

Features AN3261

1 Features

● The Smart Reset™ functionality is a feature that introduces a reset output response

delay. Both of the Smart Reset™ input buttons must be pressed for a defined t
period, only after which an output reset pulse is generated. This results in a robust
hardware reset. The reset function can then be assigned to the existing keys of a
device, which eliminates the traditional reset hole in the back cover of the device, while
maintaining system stability. All the STM65xx family devices have this feature with the
exception of the STM6504.

● The edge trigger functionality is a reset input with an immediate reset response and a

special debounce feature. Found only on the STM6504 (a device with single-button
edge trigger immediate reset and a single-button delayed Smart Reset™ input,
independent but with a common reset output).

● V

● Battery-low detection is an additional independent voltage monitoring function with a

monitoring/undervoltage reset. When the monitored VCC voltage drops below

CC

the factory-programmed undervoltage reset threshold V
immediately go active and remain so until V
the defined t

REC

period.

rises above V

CC

, the reset output(s)

RST

and hysteresis, plus

RST

dedicated battery-low detection output pin. It works as a pure comparator with
V

=1.25 V. STM6505 only.

REF

● Fixed input logic levels are suitable for configurations where the device driving the

input buttons (keyboard) is connected to a lower voltage than the supply voltage of the
STM65xx device. This is in contrast to the devices with the standard CMOS input logic
levels that are relative to V

and are suitable only for applications in which the device

CC

driving the inputs of the Smart Reset™ device is powered by the same voltage supply.

SRC

4/17 Doc ID 17837 Rev 1

AN3261 Typical application diagrams

2 Typical application diagrams

The STM65xx family of Smart Reset™ products provides a broad variety of options for

various types of applications.

2.1 Single-button reset

The STM65xx devices allow for different reset input configurations. In simple applications,

only one input reset button with delayed reset may be sufficient. In this case, for product

options without internal input pull-up resistors, SR0

together or the unused SR

input permanently grounded. In the case of a product version
with internal input pull-up resistors, just connect the inputs together. Permanent grounding
of the unused SR
pull-up resistor from V

input would, in this case, cause a continuous current to flow through the

to VSS.

CC

Figure 1. Single-button Smart Reset™ typical application diagram, with “early-

warning” feature, STM6503

V

CC

and SR1 can be either connected

V

CC

RST

TSR

RESET

STM6503

SR1

Early

V

1. Early warning feature: the input reset push-button can be also used as an early warning to the processor

(through the interrupt input) that a reset may come after the t

SR0

SS

warning

SRC

INT/
NMI

reset setup delay.

V

CC

MCU

V

SS

PUSH-BUTTON
SWITCH

Doc ID 17837 Rev 1 5/17

Typical application diagrams AN3261

Figure 2. Timing diagram - single push-button Smart Reset™

t

SRC

SR0

SR1

t

REC

RST

6/17 Doc ID 17837 Rev 1