ST AN3254 APPLICATION NOTE

AN3254

Application note

SPI protocol for the STPMC1 metering device

Introduction

The STPMC1 device is an ASSP designed for effective measurement in power line systems utilizing the Rogowski coil, current transformer, and shunt or Hall current sensors. Used in combination with one or more STPMSx ICs, it implements all the functions needed in a 1, 2, or 3-phase energy meter. It can be coupled with a microprocessor for multifunction energy meter or it can directly drive a stepper motor for a simple active energy meter.

All the data measured by the STPMC1 are accessible through the SPI port, which is also used to configure and calibrate the device. The configuration and calibration data are retained in a 112-bit OTP block; in any case, these data can be dynamically changed in microprocessor based meters.

Measured data (like active and reactive energy, total and per phase, phase V

RMS

, I

RMS

and instantaneous voltage and current, line frequency, phase status, etc.) should be read by the microcontroller at a fixed time interval to be further processed.

This application note describes the SPI protocol to read measured data from the STPMC1 in a multiphase energy meter and how these readings should be processed by the application.

For more details on the device please refer to the STPMC1; Programmable poly-phase energy calculator IC, datasheet.

Figure 1. STPMC1 based application block diagram



N R S T

Current

Sensor

Voltage

Sensor

Current

Sensor

Voltage

Sensor

Current

Sensor

Voltage

Sensor

Current

Sensor

STPMS1

DAR

DAS

(

DAT

DAN

(

DAH

Ener gy

No Load

STPMC1

Tamper

Negative

powe r

LED indicators

Stepper CounterStepper Counter

4 wires

SPI

Appl ication S upp ort and

Application Support and

Peri phera l Control

Perip heral Cont rol

MCU

November 2010 Doc ID 17783 Rev 1 1/24

www.st.com

Contents AN3254

Contents

1 SPI module description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.1 Connection to microcontroller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2 SPI interface timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3 SPI operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3.1 Remote reset request . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3.2 Data registers writing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3.3 Data registers permanent writing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3.4 Reading data registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4 Data processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.1 Reading process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.1.1 Data register assembling example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

4.2 Parity check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

4.2.1 Parity check example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

4.3 Unpacking data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

5 Converting readings into measured values . . . . . . . . . . . . . . . . . . . . . 16

5.1 Energies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

5.2 Other values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

5.2.1 Voltage, current, and frequency calculation . . . . . . . . . . . . . . . . . . . . . . 18

5.2.2 Other values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

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AN3254 SPI module description

1 SPI module description

The STPMC1 SPI interface supports a simple serial protocol, which is implemented in order to enable a communication between a host system (microcontroller or PC) and the device.

With this interface it is possible to perform the following tasks:

● remote reset of the device

● temporary and permanent programming of internal configuration/calibration data and

system signals

● reading of internal data registers (shown in Figure 5).

Four pins of the device are dedicated to this purpose: SCS, SYN, SCL, and SDA.

When the STPMC1 is in standalone mode, SYN, SCL, and SDA can provide information on the meter status (see the STPMC1 datasheet for more information) and are not used for SPI communication. In this document, the SYN, SCL, and SDA operation as part of the SPI interface is described.

SCS, SYN, and SCL are all input pins while SDA can be input or output depending on whether the SPI is in write or read mode.

The internal registers are not directly accessible, rather, a 32-bit of transmission latches are used to pre-load the data before being read or written to the internal registers.

The condition in which SCS, SYN, and SCL inputs are set to a high level determines the idle state of the SPI interface and no data transfer occurs. Any SPI operation should start from this idle state. The exception to this rule is when the STPMC1 has been put into standalone application mode. In such mode it is possible that pin states of the SCL, SDA, and SYN are not high due to the states of corresponding internal status bits.

● SCS: enables SPI operation when low, both in standalone and in peripheral operating

mode. This means that the master can abort any task in any phase by deactivation of SCS. In standalone mode SCS high enables SYN, SCL, and SDA to output the meter status.

● SYN: when SCS is low, the SYN pin status selects if the SPI is in read (SYN=1) or write

mode (SYN=0). When SCS is high and SYN is also high, the results of the input or output data are transferred to the transmission latches.

● SCL: is the clock pin of the SPI interface. This pin function is also controlled by the SCS

status. If SCS is low, SCL is the input of the serial bit synchronization clock signal. When SCS is high, SCL is also high, determining the idle state of the SPI. Configuration bit SCLP controls the polarity of the clock. SCLP=0 sets the clock idle state SCL=1, while SCLP=1 sets the clock idle state SCL=0.

● SDA: is the data pin. If SCS is low, the operation of SDA is dependent on the status of

the SYN pin. If SYN is high, SDA is the output of serial bit data (read mode). If SYN is low, SDA is the input of serial bit data signal (write mode). If SCS is high, SDA is idle.

When SCS is active (low), the signal SDA should change its state at the trailing edge of signal SCL and the signal SDA should be stable at the next leading edge of signal SCL. The first valid bit of SDA is always started with activation of signal SCL. This is valid if SCLP=0, otherwise the polarity of the clock is inverted.

A high level signal for these pins means a voltage level higher than 0.75 x V level signal means a voltage value lower than 0.25 x V

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, while a low

SPI module description AN3254

1.1 Connection to microcontroller

The SPI master should be implemented by a host system, a PC, or a microcontroller.

The microcontroller’s SPI bus is usually a 4-wire bus with full duplex functionality, whose signals are usually named as:

● SCLK: serial clock (output from master)

● MOSI: master output, slave input (output from master)

● MISO: master input, slave output (output from slave)

● SS: slave select (active low, output from master)

The best way to connect this standard SPI port to the STPMC1 SPI is to have SCS and SYN driven from some general purpose I/O port and SCL and SDA driven from SPI pins.

The suggested connection between the microcontroller and the STPMC1 is the following:

● MISO connected to SDA

● MOSI not connected

● SCLK connected to SCL

● SS connected to SCS

● a general purpose I/O pin connected to SYN.

In this way, the SPI peripheral unit of the microprocessor should operate as 2-wire (simplex synchronous transfers) SPI.

The microprocessor SPI peripheral can be used during STPMC1 device reading, while during the writing process it is possible to implement the SPI protocol via firmware.

In fact, in real applications the meter is calibrated and configured during meter production, so the main microcontroller task is to read from the device and, more rarely, to reset the device.

Moreover the reading time is crucial for a correct evaluation of the device data, it is advisable to emulate the writing procedure by firmware and to read using the SPI peripheral functionality, therefore exploiting all the port performances to reach very fast reading.

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AN3254 SPI interface timings

2 SPI interface timings

Table 1. SPI interface timings

Symbol Parameter Min. Typ. Max. Unit

SCLKr

SCLKw

OFF

SYN

Data read speed 32 MHz

Data write speed 100 kHz

Data setup time 20 ns

Data hold time 0 ns

Data driver on time 20 ns

Data driver off time 20 ns

SYN active width 2/f

In Ta bl e 1 above, f details).

XTAL1

is the oscillator clock frequency (see the STPMC1 datasheet for

XTAL1

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SPI operations AN3254

3 SPI operations

3.1 Remote reset request

The STPMC1 has no reset pin. It is automatically reset by the power on reset (POR) circuit when the V giving a dedicated command, the timing diagram is shown in Figure 2.

The reset through SPI (remote reset request - RRR) is sent from the onboard microprocessor when a malfunction of the metering device has been detected.

Unlike the POR, the RRR signal does not cause the 30 ms retarded restart of the analog module and the 120 ms retarded restart of the digital module. This reset does not clear the mode signals.

Figure 2. Remote reset request timing

SCS

crosses the 2.5 V value but it can be reset also through the SPI interface

SYN

SCL

SDA

t2t

t4t

t6t

Note: All the time intervals must be longer than 30 ns. t

also be longer than 30 ns.

3.2 Data registers writing

Each writable bit (configuration and mode signals bits) of the STPMC1 has its own 7-bit absolute address (see the STPMC1 datasheet for configuration bits map).

7 →t8

is the reset time, this interval must

In order to change the state of some pins, a byte of data via the SPI must be sent to the device. This byte consists of 1-bit data to be written (MSB), followed by a 7-bit address of the destination bit, which makes a command byte.

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AN3254 SPI operations

For example, to set the STPMC1 configuration bit 47 (part of the R-phase current channel calibrator) to 1, the decimal 47 must be converted to its 7-bit binary value: 0101111. The byte command is then composed as:

1 bit DATA value+7 bits address = 10101111 (0xAF)

The same procedure should be applied for the mode signals, which also have their specific address.

The LSB of the command is also called EXE bit because, instead of a data bit value, the corresponding serial clock pulse is used to generate the necessary latching signal. In this way, the writing mechanism does not need the measurement clock in order to operate, which makes the operation of the SPI module of the STPMC1 completely independent from the rest of the device logic, except from the signal POR.

The writing procedure timing is shown in Figure 3.

Figure 3. Timing for writing configuration bits and mode signals

SCS

SYN

SCL

SDA

→t2 (> 30 ns): SPI out of idle state

→t3 (> 30 ns): SPI enabled for write operation

: data value is placed in SDA

: SDA value is stable and shifted into the device

→t5 (> 10 µs): writing clock period

→t5: 1-bit data value

→t6: 6-bit address of the destination latch

→t7: 1-bit EXE command

: end of SPI writing

: SPI enters idle state

t4t

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SPI operations AN3254

Commands for changing configuration bits and system signals should be sent during active signals SCS and SYN, as it is shown in Figure 3.

The SYN must be put low in order to disable the SDA output driver of the device and to make the SDA an input pin. A string of commands can be sent within one period of active signals SCS and SYN or a command can be followed by reading the data record but, in this case, the SYN should be deactivated in order to enable the SDA output driver and a SYN pulse should be applied before activation of the SCS in order to latch the data.

Given the connection between the STPMC1 and a microcontroller, as shown in the previous paragraph, it is possible to implement the writing procedure in the firmware through the following steps:

1. disable the SPI peripheral

2. set MISO, SCLK, and SS to be output

3. set the pin which is connected to SYN to be output high

4. activate SCS first and then SYN

5. activate SCL

6. apply a bit value to SDA and deactivate SCL

7. repeat the last two steps seven times to complete one byte transfer

8. repeat the last three steps for any remaining byte transfer

9. deactivate SYN and the SCS

10. enable again the SPI module.

To temporarily set any bit, it is necessary to set the RD system signal before any other bit. This bit determines the device functioning from OTP shadow latches and not from OTP memory. The procedure to set this signal is that shown above.

In the case of a precharge command (0xFF), emulation of the above is not necessary, it can be sent before any reading command. In fact, due to the pull up device on the SDA pin the processor needs to perform the following steps:

1. activate SYN first in order to latch the results

2. after at least 1 µs activate SCS

3. write one byte to the transmitter of SPI this produces 8 pulses on the SCL with SDA=1

4. deactivate SYN

5. read the data records as shown in Section 3.4 (the sequence of reading is altered)

6. deactivate SCS.

3.3 Data registers permanent writing

In order to make a permanent set in OTP memory of some configuration bits, the following procedure should be conducted:

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