This application note describes all the possible demo applications helpful in carrying out a
full evaluation of STHV748 functions.
The STHV748 high-voltage, high-speed pulser generator features four independent
channels. It is designed for medical ultrasound applications, but can also be used for other
piezoelectric, capacitive, or MEMS transducers.
The device contains a controller logic interface circuit, level translators, MOSFET gate
drivers, noise blocking diodes, and high-power P-channel and N-channel MOSFETs as
output stages for each channel. There is also a clamping-to-ground circuitry, anti-leakage,
an anti-memory effect block, a thermal sensor, and a HV receiver switch (HVR_SW), which
guarantees a strong decoupling during the transmission phase.
Moreover, the STHV748 includes self-biasing and thermal shutdown blocks (see block
diagram in Figure 1). Each channel can support up to five active output levels with two half
bridges. The output stage of each channel is able to provide ±2 A peak output current. In
order to reduce power dissipation during continuous wave mode, the peak current is limited
to 0.6 A (a dedicated half bridge is used).
The STHV748 PCB demo can drive four transducers as 4-channel transmitters/receivers for
ultrasound and other applications. The demo board consists of one STHV748 in a 64-lead
9x9x1 mm QFN package.
The STHV748 can deliver up to a ±2.0 A source and sink current to a capacitive transducer.
It is designed for medical ultrasound imaging and ultrasound material NDT applications.
The STHV748 output waveforms can be displayed directly for each channel Ch A/B/C/D
using an oscilloscope by connecting the scope probe to the J1, J2, J3, and J4 jumpers,
moreover, the user can select whether or not to connect the onboard equivalent load, a 300
pF 200 V capacitor paralleled with a 100 Ω, 2 W resistor (or alternatively, 200 Ω//50 pF -
200 Ω//250 pF - no-load). A coaxial cable can also be used to easily connect the user
transducer.
IN1/2/3/4, for each channel available in IC, is controlled via the 13 pins of the C1 (CONN1)
head connector on the board (34 pins).
The main issues in this PCB design are the capacitance values, to ensure good filtering and
an effective decoupling between the low voltage inputs (IN1, IN2, IN3, IN4, and EN for each
channel) and the HV switching signals (XDCR, HVOUT, etc.,) which is ensured by the layer
separation used.
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4 PCB demo description
Figure 2.PCB demo schematic
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4.0.1 Capacitances and resistances list
Table 3.Capacitances and resistances list
NameTypeValueClass
C2ChDSMC0805250 pF100 V
C3SMC12060.22 µF100 V
C4SMC12060.22 µF100 V
C5SMC12060.22 µF100 V
C6SMC12060.22 µF100 V
C7SMC12060.22 µF100 V
C8SMC12060.22 µF100 V
C9SMC12060.22 µF100 V
CLVASMC080520 pFLV
CLVBSMC080520 pFLV
CLVCSMC080520 pFLV
CLVDSMC080520 pFLV
Cm1SMC06033.5 nFLV
Cm2SMC06033.5 nFLV
Cm3SMC06033.5 nFLV
Cm4SMC06033.5 nFLV
Cp1SMC060320 nFLV
Cp2SMC060320 nFLV
Cp3SMC060320 nFLV
Cp4SMC060320 nFLV
Cs1SMC12060.22 µF100 V
R1SM080510 kΩLV
R10SM201050 Ω250 mW
R11SM201050 Ω250 mW
R12SM201050 Ω250 mW
R13SM080575 ΩLV
R14SM080575 ΩLV
R15SM080575 ΩLV
R16SM080575 ΩLV
R1ChASM2512200 Ω2 W
R1ChBSM2512200 Ω2 W
(1)
R1ChCSM2512200 Ω2 W
R1ChDSM2512200 Ω2 W
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Table 3.Capacitances and resistances list (continued)
NameTypeValueClass
R2SM080510 kΩLV
R2ChASM2512200 Ω2 W
R2ChBSM2512200 Ω2 W
R2ChCSM2512200 Ω2 W
R2ChDSM2512200 Ω2 W
R3SM201050 Ω250 mW
R4SM201050 Ω250 mW
R5SM201050 Ω250 mW
R6SM201050 Ω250 mW
R7SM201050 Ω250 mW
R8SM201050 Ω250 mW
R9SM201050 Ω250 mW
RLVASM0805200 ΩLV
RLVBSM0805200 ΩLV
RLVCSM0805200 ΩLV
RLVDSM0805200 ΩLV
C1SMC12060.22 µF100 V
C10SMC12060.22 µF100 V
C11SMC12060.22 µF100 V
C12SMC12060.22 µF100 V
C13SMC12060.22 µF100 V
C14SMC12060.22 µF100 V
C15SMC12060.22 µF100 V
C16SMC12060.22 µF100 V
C17SMC06030.22 µFLV
C18SMC06030.22 µFLV
C19SMC06030.22 µFLV
C1ChASMC080550 pF100 V
C1ChBSMC080550 pF100 V
C1ChCSMC080550 pF100 V
C1ChDSMC080550 pF100 V
C2SMC12060.22 µF100 V
C20SMC06030.22 µFLV
C21SMC06030.22 µFLV
C22SMCVF22 µF100 V
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Table 3.Capacitances and resistances list (continued)
NameTypeValueClass
C23SMCVF22 µF100 V
C24SMCVF22 µF100 V
C25SMCVF22 µF100 V
C26SMCVC22 µF16 V
C27SMCVC22 µF16 V
C28SMCVC22 µF16 V
C2ChASMC0805250 pF100 V
C2ChBSMC0805250 pF100 V
C2ChCSMC0805250 pF100 V
1. LV stands for Low voltage class
Figure 3.PCB top layout
Figure 4.C1 (CONN1) head connector description
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Table 4.C1 head connector pin vs STHV748 pinout
Channel
A
C
B
D
All channel26IN417
CN1-pin (head
connector)
31IN1_A63
33IN2_A62
14IN3_A61
34IN1_C31
23IN2_C30
17IN3_C29
9IN1_B18
13IN2_B19
15IN3_B20
1IN1_D50
5IN2_D51
19IN3_D52
STHV748 pin nameSTHV748 pin number
Figure 5.PCB demo image
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AN3240Operating supply conditions
5 Operating supply conditions
Table 5.DC working supply conditions
Operating supply voltages
SymbolParameterMinTypMaxValue
VDDPPositive supply voltage2.733.6V
VDDMNegative supply voltage-2.7-3-3.6V
VDDPositive logic voltage2.43Min(3.6,VDDP+0.3)V
HVP0TX0 high voltage positive supply95V
HVP1TX1 high voltage positive supply95V
HVM0TX0 high voltage negative supply-95V
HVM1TX1 high voltage negative supply-95V
Warning:The high voltage pins must be HVP0 ≥ HVP1 and HVM1 ≥
IHVP1TX1 high voltage positive supply current14.5mA
IHVM1TX1 high voltage negative supply current11mA
Table 7.Power-up sequence
Power up sequence
1VDDP
2VDDM or VDD
3VDD or VDDM
4HVM0
5HVP0
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Table 7.Power-up sequence (continued)
Power up sequence
6HVM1 or HVP1
7HVP1 or HVM1
Note:VDD: Logic voltage, 0 to 3 V (B5 conn.)
VDDP: Positive supply voltage 0 to 3 V (B6 conn.)
VDDM :Negative supply voltage -3 V to 0 (B7 conn.)
HVM0: TX0 high voltage negative supply, (B3 conn.)
HVP0:TX0 High voltage positive supply, (B1 conn.)
HVM1:TX1 high voltage negative supply, (B4 conn.)
HVP1:TX1 High voltage positive supply, (B2 conn.)
5.1 Load selection
It is possible to select the following load configuration for each channel (ChA/B/C/D) using
J1, J2, J3, and J4:
●100 Ω // 300 pF
●200 Ω // 50 pF
●200 Ω // 250 pF
●No-load
Figure 6.Load configuration schematic
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AN3240Operating supply conditions
5.2 Fixed STHV748 pins on PCB demo
In order to clarify some special pin behavior, a short explanation is given:
EN allows the minimizing of the power consumption. If EN=0, the self-voltage reference is
not supplied. By supplying the reference externally, the total power consumption is reduced.
THSD is a thermal flag. The output stage of the THSD pin is a Nch-MOS open-drain, so it is
necessary to connect the external pull-up resistance (R2≥10 kΩ) to the positive low-voltage
supply (see Figure 2). If the internal temperature surpasses 160 °C, THSD goes down and
puts all the channels into HZ state. By externally forcing THSD to a positive low-voltage
supply, the thermal protection is disabled.
D_CTR can be used to optimize 2nd HD performance by tuning the fall propagation delay
(TDF - see the datasheet, STHV748; 5-level, ±90 V, 2 A high speed pulser with four independent channels). If D_CTR is equal to ground, TDF has the nominal value. If D_CTR
is being varied from 2 V to 4.2 V, TDF can be changed from -1 ns to +600 ps, with respect to
the nominal value.
EXPOSED-PAD is internally connected to the substrate. It can be floating or connected to a
100 V capacitance toward ground, in order to reduce noise during the receiving phase. The
fixed configuration of the PCB application pins described is given in Tab le 8 .
Table 8.Special pin connections
Special pins on the PCB demo
NameDescriptionStatus on board
Enable pin
With EN=1, the IC internally generates the reference
voltages on REF_HVP1/0 (7, 10, 39, 42-pin) and
REF_HVM1/0 (2, 15, 34, 47-pin). These voltages are set
EN 64-pin
THSD 32-pinThermal shutdown pin
D_CTR 16-pinDelay control pinNot active – forced directly to ground
EXPOSED-PADSubstrate
VDDP below HVP and VDDP above HVM, respectively:
REF_HVM# = HVM# + VDDP
REF_HVP# = HVP# - VDDP
When EN=0, it is required that an external voltage is
applied to REF_HVM# and REF_HVP# pins (see the
STHV748 datasheet).
Active – forced to 3 V through
R1=10 kΩ
Active – forced to 3 V through R2=10
kΩ. The user can monitor the THSD
status on TP1 (test point)
Not active – connected to ground
through Cs1=0.22 µF
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Demonstration kit compositionAN3240
6 Demonstration kit composition
There are essentially 3 methods to drive the STHV748 demo board, for each of them the
user must connect a custom PCB adapter, via the C1 connector, to drive the IC pulser.
6.1 Method 1 (flexible - based on BNC PCB adapter)
In this case, the demo board, described in Section 3, is being connected up, via the C1
connector, to a custom PCB adapter with 8 BNC connectors. A couple of BNC are dedicated
to IN1 and IN2 for each channel and usable for the external waveforms generator. In
addition, 2 switches are dedicated to connecting IN3 and IN4 to 0V or VDD, in accordance
with the truth table (seeTab l e 2 and Figure 8). The composition of the demonstration kit is
shown in Figure 7 and 9.
Figure 7.Demonstration kit composition (PCB demo plus BNC PCB adapter)
Figure 8.PCB adapter image, top layout and top schematic
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Figure 9.Demonstration kit system image
6.1.1 How to drive the STHV748 for method 1
The user simply needs a clock generator (or an AVG) in a way to drive pins IN1 and IN2 with
a proper time pulse width, consequently, it is possible to fix a truth table state for XDCR
using the 2 switches on the PCB adapter connected to VDD supply or GND, which control
IN3 and IN4. See the example diagram below (Figure 10):
Figure 10. Inputs set of generators for PW mode (4 cycles - TX0 pulser Chx)
,1
,1
9'&JHQHUDWRU
9'&JHQHUDWRU
([WHUQDOVHWRIJHQHUHWRUV
IRU3:PRGHF\FOHV
&+
&+
,1
,1
9
,1
,1
9
+93
;'&5
+90
7
7BFO
!-V
Note:The DC generators, shown in Figure 10, are symbolic, in the truth table the VDD voltage is
selected by the user through the J9 jumper on the PCB demo, which supplies the switches
on the PCB adapter.
In Figure 10, an example of a TX0 pulser in PW mode setting, is described. It is possible to
pass easily to a TX1 pulser PW mode in the same example shown in Figure 10, in fact, it is
enough to change the IN3 status, through the switch on the PCB adapter, from 0 to VDD
(IN4=0 - not touched). This simple commutation on switch IN3 allows 4 cycles for the TX1
pulser.
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In the same manner the user fixes the other states, such as CW mode (IN3=VDD,
IN4=VDD) or MaxHV0 and HV1 mode (IN3=0, IN4=VDD), by just changing the switch
position on the PCB adapter.
The status of switches IN3 and IN4 is being monitored by two SMD LED diodes, for each
switch, on the PCB adapter (D1 red and D2 green close to IN3, D3 red and D4 green close
to IN4).
As shown in Figure 11, the red light near the switch indicates state 1 (when VDD voltage is
active, the switch button is in the left position) while the green light indicates state 0 (when 0
is active, the switch button is in the right position).
Figure 11. Diodes LED status on the PCB adapter which indicates IN4=1 and IN3=0
When the switch button is in the center position the status is on HZ.
6.2 Method 2 (use of the motherboard based on the STM3210EEVAL)
The demo kit, in this solution, is made up of a motherboard based on the STM3210E-EVAL
plus the PCB demo mentioned into Section 3 (see Figure 12). It doesn't require any manual
driving because the STM3210E-EVAL microcontroller is programmed to deliver some demo
patterns.
Figure 12. Demonstration kit based on the STM3210E-EVAL system
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Figure 13. Demonstration kit based on the STM3210E-EVAL system image
6.2.1 Motherboard communication setting
The STM3210E-EVAL system communicates with the PCB demo through the C1 connector,
following the signal setting represented in Figure 14.
6.2.2 Motherboard driving performance for the PCB demo
The STM3210E-EVAL demonstration board (motherboard) has been programmed to show
the STHV748’s main functions. In particular, the firmware installed into the internal memory
allows the PCB demo to be driven in a way that the STHV748 pulser performs an example
of three work conditions:
●Pulse wave mode (PW), (see Figure 15)
●Continuous wave mode (CW), (see Figure 16)
●Pulse cancellation mode (PC), (see Figure 17)
Figure 15. PW mode functions
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Figure 16. CW mode functions
Figure 17. PC mode functions
Figure 18. Supply connection for demonstration kit with the STM3210E-EVAL
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6.2.3 Turn on demo system
1.First step:
Connect all supplies as indicated in Figure 18 based on the following power up sequence
(see Ta bl e 7):
–1st USB connection (power supply for the motherboard and digital supply DVDD
for the STHV748)
–2nd analog low voltage connections for the daughter board (VDDP=+3 V,
VDDM=-3 V)
–3rd high voltage power supply connections for the daughter board (HVP0/1=+90 V,
HVM0/1=-90 V)
2. Second step:
–After the power supply connections, the onboard display appears as follows
(Figure 19):
Figure 19. Main menu on STM3210E-EVAL display
3. Third step:
–By moving the “Joystick” key up and down the user can select one of the three
modes available (PW, CW or PC mode) in the “Main menu”. When the user has
selected a mode the Joystick key must be pressed to descend into the mode menu
(see Figure 20).
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Figure 20. Main menu selection on the STM3210E-EVAL display
–Assuming that the user has descended into the “Continuous Mode” menu, it is
possible to manage the PW mode. In fact, by moving the Joystick key “Generate
Signals” can be selected (see Figure 21). The Joystick key must now be pressed
to run the PW mode function. If the user wants to change the choice, it is enough
to select and press “Return” to go to the main menu and choose another function,
such as CW or PC.
Figure 21. Example of “Continuous Mode” selection on the STM3210E-EVAL display
–After having run the mode, the user can stop the “Continuous Mode” and return to
the previous menu just by pressing the Joystick key on the board (see Figure 22).
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Figure 22. Exit the mode selected on the STM3210E-EVAL display
6.2.4 Turn off demo system
4. Fourth step
Demo off can be executed by following the power down sequence:
–1st high voltage power off (HVP0/1=+90 V, HVM0/1=-90 V)
–2nd low voltage power off (VDDP=+3 V, VDDM=-3 V)
–3rd unplug the USB connection (power off supply for the motherboard)
Figure 23. Reset key on the STM3210E-EVAL
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6.2.5 Acquisition examples of PW, CW and PC mode
Figure 24. PW mode (HVP0=60 V HVM0=-60 V 100 Ω//300 pF)
Figure 25. CW mode HVP1=5 V HVM1=-5 V 100 Ω//300 pF
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Figure 26. CW mode HVP1=10 V HVM1=-10 V 100 Ω//300 pF
Figure 27. PC mode HVP0=60 V HVM0=-60 V 100 Ω//300 pF
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6.3 Method 3 (LabView interface - use of the HSDIO PCB
connector)
The user, who has the possibility of using LabView equipment, as shown in Figure 28, can
evaluate the STHV748 detailed functions.
Figure 28. LabView equipment used to develop the STHV749
In this case, customized software has been developed (STHV748.vi) to manage all
channels in such a way as to test them in several working conditions (see the PC display -
Figure 29).
In the case of the user having the LabView chain, previously mentioned, it's possible to
connect the PCB demo to the LabView system through a PCB connector shown in
Figure 30.
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Figure 29. STHV748 LabView PC control panel
Figure 30. STHV748 demo system for LabView evaluation
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AN3240Revision history
7 Revision history
Table 10.Document revision history
DateRevisionChanges
21-Dec-20101Initial release.
Doc ID 17689 Rev 131/32
AN3240
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