ST AN3232 Application note
AN3232
Application note
Mounting recommendations
for STAC
Introduction
RF power transistors are amongst the highest power density devices in the semiconductor
industry. It is crucial to the reliability and performance of such devices to consider
mechanical stress and thermal and electrical resistance within the application environment.
®
boltdown packages
The general purpose of this application note is to provide guidelines for mounting various
types of STAC
by soldering. Specific attention is paid to the STAC244B and STAC265B boltdown styles and
the STAC244F and STAC265F flangeless styles, which are used to encapsulate numerous
VDMOS and LDMOS technology products.
This application note is intended to provide mounting tips and design guidelines. For actual
data please refer to the relevant product datasheet.
STAC
is a registered trademarks of STMicroelectronics.
Figure 1. STAC boltdown packages
®
packages in amplifiers or application boards (PCB) by means of bolting or
August 2011 Doc ID 17594 Rev 3 1/26
www.st.com
Contents AN3232
Contents
1 Epoxy sealed, non-hermetic RF power packages . . . . . . . . . . . . . . . . . 5
2 Exceptional thermal performance potential of the STAC package
concept . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3 Heatsink selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4 Core preparation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5 Mounting base surface conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6 Thermal interface material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7 Seating plane . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
8 Printed circuit board (PCB) considerations . . . . . . . . . . . . . . . . . . . . . 15
9 Package attachment to core by means of boltdown method . . . . . . . 16
9.1 Required hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
9.2 Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
9.3 Procedure summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
10 Package attachment to thermal base by means of soldering . . . . . . . 20
10.1 Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
10.2 Solder reflow equipment and methods . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
11 Electrical connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
12 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2/26 Doc ID 17594 Rev 3
AN3232 List of tables
List of tables
Table 1. Preferred copper core thickness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 2. Surface conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 3. Common TIMs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 4. Recommended screw torque . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 5. Pb-free process - package classification reflow temperatures . . . . . . . . . . . . . . . . . . . . . . 21
Table 6. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Doc ID 17594 Rev 3 3/26
List of figures AN3232
List of figures
Figure 1. STAC boltdown packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 2. Drying times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Infrared imaging of a STAC package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Pocket depth consideration (mm) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 5. Lead bending . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Package cut and pads layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 7. Ideal screw-center spacing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 8. First boltdown mounting steps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 9. SEHO FDS “MAXIPOWER” reflow oven . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 10. Component level temperature profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
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AN3232 Epoxy sealed, non-hermetic RF power packages
1 Epoxy sealed, non-hermetic RF power packages
Epoxy sealed products, such as the STAC package family, should be received in an N2backfilled, vacuum-sealed ESD bag containing a desiccant. This decreases the possibility of
moisture uptake by the package materials during transit and long-term storage. STAC
packages carry a moisture sensitivity rating of 3 (MSL3), but have demonstrated capabilities
of up to MSL1.
Even with such shipping methods, it is advised to store epoxy sealed packages in the
original containers, or in a dry box, until required for soldering. When the environmental
history of devices is not well-known, such as after a prolonged storage period, it is a wellpracticed safety measure to bake non-hermetic packages for 24 hrs at 125 °C prior to
soldering operations. These conditions can be accelerated or lengthened as a function of
temperature, up to the limits imposed by shipping containers, by trays, or by device
maximum ratings. Refer to Figure 2 for recommended baking conditions.
Figure 2. Drying times
Under no circumstances should any epoxy-sealed package be treated as a hermetically
sealed package, due to the fact that such sealing materials are not impervious to moisture
ingress. However, it is important to point out that RF Power packages are typically
constructed using engineering ceramics and polymers which, on their own, demonstrate
high resistance to moisture penetration, such as the proprietary liquid crystal polymer
materials upon which STAC packages are realized.
Doc ID 17594 Rev 3 5/26
Epoxy sealed, non-hermetic RF power packages AN3232
Power RF packages typically require a reliable, low thermal resistance attachment to a
heatsink. In this respect, nothing out-performs a direct attachment of the device flange, or
thermal base, to the heatsink by means of soldering. This can be accomplished using any of
the PbSn or Pb-free soldering methods used throughout the electronic industry. The final
soldering step may be preceded by a hot-solder dip of the package base and/or leads, as
required for situations that require attention to Au content of the solder joint. Alternatively,
the packages may be inserted into an amplifier using a pick-and-place methodology, so that
complete soldering is accomplished in a single reflow.
Some amplifier assemblies require a manual approach for device positioning on a PCB
while soldering bases to copper core heatsinks. In such manual operations STAC boltdown
style packages have the unique possibility of serving as a built-in clamp to accomplish both
tasks expeditiously. These manual efforts are rewarded by an extremely low thermal
resistance, achieved by an ultra-thin solder joint case-to-heatsink, referred to as the Rth
. At the same time, the need to allocate valuable amplifier real estate to specialized
HS
C-
clamping fixtures is eliminated.
The approaches to soldering RF transistors in amplifier housings are as numerous as the
quantity of RF package outlines. While the traditional demand for high levels of ruggedness
in RF devices assures an intrinsic high tolerance to a wide variety of assembly methods, the
high-stress nature of any soldering operation requires careful consideration. Users
ultimately assume responsibility for developing and qualifying their soldering processes, and
therefore it is strongly recommended to fully evaluate temperature profiles at all steps in the
soldering procedure to avoid excessive peak temperatures and ramp rates.
When amplifier assemblies require cleaning after soldering operations, the use of a nonreactive cleaning agent is recommended. All residue from reactive flux should be removed
according to the flux supplier's recommendations.
If a non-aqueous cleaning method is employed, it must be followed by cleaning with DI water
to remove all ionic contamination. It is recommended to periodically check the conductivity
of the DI rinse to insure that levels of ionic contamination are as low as possible. In cases
where heavy ionic contamination is present, multiple DI rinses in isolated baths should be
used. Proceed from the most to the least contaminated rinsing system to maximize cleaning
effectiveness.
In general it is recommended to minimize the use of flux, to use no-clean flux, or to adopt
fluxless soldering techniques. When there is doubt as to the behavior of residual flux or flux
levels, consider a two-step solder approach. Since the PCB and other components may
involve flux, an initial soldering step of the majority of non-critical components can be done,
followed by a thorough cleaning. The second solder step, with greatly reduced flux content,
can be planned for more critical components such as epoxy sealed RF transistors. An
added benefit of a two-step operation is that non-solder thermal interface materials (TIMs),
such as thermal compounds, are not influenced by aggressive flux cleaning.
Following DI rinsing operations, the entire assembly should be baked, as determined by
user experimentation, before power is applied. It is suggested to perform this drying at 125
°C for 24 hrs, if all components are rated for this condition. A longer bake time is
recommended at lower temperatures. Refer to Figure 2 for some suggestions.
OEM equipment operating conditions should be specified for operation only in a “noncondensating” environment. If there is a question of humidity in ambient conditions in power
cycling, a heating/drying cycle is recommended before power is applied.
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AN3232 Exceptional thermal performance potential of the STAC package concept
2 Exceptional thermal performance potential of the
STAC package concept
RF Power transistors are made up of hundreds of thousands of heat generating cells,
organized in an ultra-compact geometry at the silicon chip level. The necessity to generate
RF power at ever-increasing frequencies leads directly to the shrinking of silicon geometries
to ever-smaller portions of electrical wavelength. The result is unprecedented power density,
unmatched by most devices in the semiconductor industry. Indeed, such a power density
approaches those frequently encountered in the realm of high-energy physics.
The highest priority of the power transistor package is efficient evacuation of the incredible
thermal flux from the active regions of semiconductor chips to the external environment.
Great advances made to improve packaging systems and materials have enhanced this
effect, including the use of high thermal conductivity materials, the reduction of thermal path
length, and the improvement of thermal interfaces by way of superior flatness coupled with
enhanced TIMs.
A demonstration of the high power density of one device in the STAC family is shown in
Figure 3 by way of infrared imaging. In this example, the junction temperature of the
semiconductor chips, dissipating a total of 400 W continuously, is maintained uniformly
below the maximum allowable temperature of 200 °C, while the case is elevated almost to
its maximum of 85 °C.
Figure 3. Infrared imaging of a STAC package
As is the case with many RF power devices, thermal resistance is dominated by the chips
themselves, as can be ascertained in Figure 3. In addition, the thermal conductivity of
silicon decreases with increasing temperature, therefore it is common practice to evaluate
power transistors near the maximum operating temperatures. Taking this into account, the
observed thermal resistance, or R
of approximately 0.30 °C/W for this STAC product, is
thJ-C
Doc ID 17594 Rev 3 7/26
Exceptional thermal performance potential of the STAC package concept AN3232
approximately 30 % lower than it's ceramic package cousin, the ubiquitous GEMINI
package.
This situation affords amplifier designers extreme flexibility in terms of trade-offs between
power dissipated, output power, power density, and MTTF. For example, higher power can
be dissipated for a target junction temperature, or, on the other hand, increased MTTF can
be achieved for a target case temperature with equivalent power density.
While such flexibility often shifts the burden of cooling to system level, this decision is often
the more cost effective solution or easier to manage. Alternatively, such a solution could
translate into the ability to move an amplifier system from ground level to pole top. In the end
analysis, the choice of heatsinking system depends on the specific device and application
needs.
8/26 Doc ID 17594 Rev 3
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