ST AN3161 Application note
AN3161
Application note
Using the STGW35HF60WD advanced PT IGBT in parallel
Introduction
When two or more IGBTs are connected in parallel to improve the total efficiency in high
output power systems, special care is required to ensure that current sharing between the
devices is as equal as possible. Current sharing is mainly influenced by differences in IGBT
static parameters, circuitry layout (both driving and power) and thermal imbalances. All of
these elements must be considered, especially when PT (punch-through) IGBTs work in
parallel, due to their negativ e V
to the market while supporting reliable and easier paralleling for higher power level
applications, ST offers the STGW35HF60WD 35 A, 600 V ultra fast IGBT with V
selection. This device is explained in greater detail in Section 3: New advanced planar PT
STGW35HF60WD.
coefficient. In order to pro vide the m ost efficien t IGBT
CE(sat)
CE(sat)
May 2010 Doc ID 17151 Rev 1 1/14
www.st.com
Contents AN3161
Contents
1 Saturation voltage impact on parallel . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1 PT, NPT and trench field stop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 General guidelines on paralleling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Thermal system impact . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 New advanced planar PT STGW35HF60WD . . . . . . . . . . . . . . . . . . . . . . 7
3.1 Notes on technology and V
3.2 E
impact on parallel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
OFF
grouping . . . . . . . . . . . . . . . . . . . . . . . . 7
CE(sat)
4 The STGW35HF60WD on the test bench . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
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AN3161 List of figures
List of figures
Figure 1. ∆IC (@TJ = 25 °C) of two paralleled IGBT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 2. ∆I
Figure 3. Static V
Figure 4. E
Figure 5. DC-DC boost scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 6. V
Figure 7. ∆I
Figure 8. ∆I
Figure 9. ∆I
Figure 10. ∆I
Figure 11. ∆I
Figure 12. ∆I
(@TJ > 25 °C) of two paralleled IGBT without negative feedback . . . . . . . . . . . . . . . . . 5
C
vs. V
OFF
CE(sat)
at TC = 25 °C (board startup) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
C
at TC = 100 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
C
at TC = 25 °C (board startup) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
C
at TC = 100 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
C
at TC = 25 °C (board startup) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
C
at TC = 100 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
C
(@20 A,15 V) derating for STGW35HF60WD . . . . . . . . . . . . . . . . . . . . . . . . 7
CE(sat)
for the STGW35HF60WD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
CE(sat)
(@20 A, 25 °C, 15 V) grouping for the STGW35HF60WD. . . . . . . . . . . . . . . . . . . . 9
Doc ID 17151 Rev 1 3/14
Saturation voltage impact on parallel AN3161
1 Saturation voltage impact on parallel
1.1 PT, NPT and trench field stop
PT IGBTs (including those offered by STMicroelectronics) have typically negative V
CE(sat)
coefficients at current operative levels. This has a very important effect when two devices
work in parallel. Due to their difference in static output characteristics, the one with the
lowest static V
carries more current than the other, as shown in Figure 1. The ∆IC is
CE(sat)
the static current difference established at the beginning.
Figure 1. ∆I
(@TJ = 25 °C) of two paralleled IGBT
C
I
CTOT=IC1+IC2
I
C1
ΔI
C
I
C2
collector current ( A )
c
I
V
CE1=VCE2
0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 2.25
Vce
collector emitter voltage (V)
Assuming the same T
power than the other, and its T
at the beginning, the IGBT carrying higher current dissipates more
J
increases. As a consequence, its V
J
the current of the IGBT in crea ses further. The IGBT carrying less current a lso d ecre ases its
static V
as a consequence of the common VCE, and its current must satisfy the
CE(sat)
following equation:
Equation 1
I
CTOTIC1 T1()IC2 T2()
4/14 Doc ID 17151 Rev 1
AM06441v1
decreases and
CE(sat)
+=
AN3161 Saturation voltage impact on parallel
Figure 2. ∆IC (@TJ > 25 °C) of two paralleled IGBT without negative feedback
Tj>25°C,
=15V
V
I
CTOT=IC(T1)+IC(T2)
I
C2
ΔI
C
collect or current (A)
c
I
I
C1
V
CE1=VCE2
GE
0 0.25 0.5 0.75 1 1.25
Vce collect or em i t t er vol t age ( V)
As a consequence of the negativ e V
1.5
coefficient, a higher ∆IC is established at high TJ
CE(sat)
1.75 2
2.25
AM06440v1
(Figure 2). This can cause thermal instability if an accurate negative feedback is not
implemented. NPT and field stop IGBTs have positive V
coefficients (the latter
CE(sat)
typically starting from low current levels). When working in parallel the one carrying the
higher current increases its temperature , which causes a V
increase. This means that,
CE(sat)
at the same on-state voltage level, the current does not increase with temperature as in PT
IGBTs; this guarantees an intrinsic balancing mechanism, preventing thermal runaway.
Doc ID 17151 Rev 1 5/14
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