ST AN3147 Application note
AN3147
Application note
STM8L family power management
Introduction
This document is intended for application designers who require a hardware implementation
overview of low power modes in the STM8L product families. It shows how to use the
STM8L devices in these modes, explains differences between different modes and gives
several examples of how to select the best mode for your application needs.
This document is not intended to replace STM8L datasheets. All values given in this
document are for guidance only. Please, refer to the related datasheet to get guaranteed
values.
March 2010 Doc ID 17035 Rev 1 1/22
www.st.com
Contents AN3147
Contents
1 Power consumption factors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 Power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Internal supply structure for STM8L101xx devices . . . . . . . . . . . . . . . . . . 5
2.2 Internal supply structure for STM8L15x devices . . . . . . . . . . . . . . . . . . . . 6
2.2.1 Brownout detector (BOR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Clock management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1 STM8L101xx clock system overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.2 STM8L15x clock system overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.3 Clock configuration and power management . . . . . . . . . . . . . . . . . . . . . . . 9
3.4 Clock selection vs. power consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4 Run and low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.1 Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.2 Overview of low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.2.1 STM8L101xx low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.2.2 STM8L15x low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.3 Slowing down the clock frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.4 Peripheral clock gating (PCG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.5 Execution from RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.6 Wait mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.6.1 Entering Wait mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.6.2 Exiting Wait for interrupt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.6.3 Exiting Wait for event mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.7 Low power run mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.7.1 Entering Low power run mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.7.2 Exiting Low power run mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.8 Low power wait mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.9 Halt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.9.1 Entering Halt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.9.2 Exiting Halt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.9.3 Active-halt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
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AN3147 Contents
4.10 Activation level control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5 Power management tips . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.1 Choosing the optimal low-power mode for your application . . . . . . . . . . . 17
5.2 GPIO initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.3 Dynamic control of pull-up resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.4 Waiting loops / delays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.5 Minimizing power consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Doc ID 17035 Rev 1 3/22
Power consumption factors AN3147
IDD fI
DynamicRun
μA MHz⁄[]× I
Static
μA[]+=
1 Power consumption factors
The STM8L microcontrollers are digital logic devices using the complementary metal oxide
semiconductor (CMOS) technology. In this type of devices, power consumption is a sum of:
● Static power (mainly caused by transistor polarization and leakage)
● Dynamic power which depends on the supply voltage and the clock frequency. It is
calculated from the formula: Dynamic power = C x V²
– C is the CMOS load capacitance
– V is the supply voltage
– f is the clock frequency.
Static consumption is negligible compared to dynamic consumption when the clock is
running. In some low power modes, when no clock is running, static consumption is the
main consumption source.
● Total consumption is a sum of static and dynamic consumption
Consequently, power consumption depends on:
● The microcontroller unit (MCU) chip size: technology used, number of transistors,
analog features/peripherals embedded and used in the application.
● The MCU supply voltage: the amount of current used in CMOS logic is directly
proportional to the squared power supply voltage (V²). Thus, power consumption may
be reduced by lowering the MCU supply voltage. This is less critical for STM8L devices
than for other microcontrollers, as an internal voltage regulator is used but this could
have an influence for the remaining components on the board.
● The clock frequency: Power consumption may be reduced by decreasing the clock
frequency when fast processing is not required by the application.
● The number of active peripherals or used MCU features (CSS, BOR, PVD,...): the
greater the number of active peripherals or features, the greater the amount of
consumed power.
● The operating mode: Power consumption depends on which mode a particular
application is running (CPU on/off, oscillator on/off,...). For an application powered by a
battery, the consumption is very important. Usually, the average consumption should
be below a certain target value to ensure an optimum battery lifetime. This means that
an application can consume more for short periods of time and keep its average current
consumption below the target value.
x f, where:
4/10 Doc ID 17035 Rev 1
AN3147 Power supply
Low Power voltage regulator
V
DD
Main voltage regulator
I/Os
1.8 V domain
1)
1.65 V-3.6 V
RAM
Flash
STM8 MCU Core
CPU
(MVR)
(LPVR)
2 Power supply
The STM8L family embeds two regulators which provide a supply voltage (V
CORE
) for the
core and internal peripherals.
Figure 1. Power supply overview
1. If VDD is lower than 1.8 V, the 1.8 V domain is supplied by the voltage on the VDD input. For low power
modes where the LPVR is used, this domain is supplied by a 1.55 V voltage.
The main voltage regulator (MVR) provides a 1.8 V supply voltage. It has a high current
capability, as it can deliver up to 25 mA. However, the own consumption of this regulator is
higher than the own consumption of the LPVR. Consequently, the MVR is used during a
standard operation only.
The own consumption of the low power regulator (LPVR) is very low, as required for low
power modes. The LPVR can deliver up to 200 µA, providing 1.55 V to the digital part of the
MCU.
After reset, the MVR provides a supply voltage (V
) to the internal digital parts of the
CORE
microcontroller. Depending on the functional mode, the MVR can be switched off. In this
case, the LPVR continues to provide the V
CORE
voltage.
The power supply is monitored by the POR/PDR (power-on reset / power-down reset) and
and BOR (brown-out reset) system. This system ensures a proper startup and reset of the
MCU, while V
is rising above the POR threshold. It resets the MCU when VDD is falling
DD
below the PDR threshold.
Note: Analog peripherals require a power supply voltage above the PDR threshold (V
while V
= 1.5 V). In this case, it is recommended to use the BOR (Brownout reset) to
PDR
guarantee a proper functionality.
The BOR is available on STM8L15x devices only.
2.1 Internal supply structure for STM8L101xx devices
The STM8L101xx devices are able to operate from 1.65 V up to 3.6 V, connected to one pair
of supply pins.
There are no dedicated supply pins for the analog voltage domain. It is recommended to use
Doc ID 17035 Rev 1 5/10
> 1.8 V,
DD
Power supply AN3147
a decoupling ceramic capacitor placed close to the supply pins.
● In Run and Wait modes, both MVR and LPVR provide the V
● In Halt / Active-halt modes, the LPVR is automatically used while the MVR is switched
CORE
.
off by the system in order to reduce current consumption.
2.2 Internal supply structure for STM8L15x devices
STM8L15x devices require a supply voltage of 1.8 V to 3.6 V. Once the supply voltage
reaches 1.8 V, the MCU can work down to 1.65 V with a limitation in the functionality of
analog peripherals.
The medium density STM8L15x devices have several supply pins, depending on the
package pincount. In addition to the main supply pair V
SS/VDD
could be present on the package.
It is recommended to use a decoupling ceramic capacitor, placed close to the supply pins.
● In Run and Wait modes, both MVR and LPVR provide the V
● In Low power run mode and Low power wait mode, the MVR has to be switched off.
Only the LPVR provides the V
● In Active-halt mode, during the Halt phase, either the MVR or the LPVR can provide the
V
. The user can select the regulator to be used.
CORE
● In Halt mode, the LPVR is automatically used, once MVR is switched off.
CORE
.
, another supply pin (V
.
CORE
DDA
)
2.2.1 Brownout detector (BOR)
The brownout detector is used to guarantee a proper functionality of all peripherals, mainly
analog ones. By default, this detector is enabled but the user can disable it through option
byte to decrease the MCU consumption by ~2.8 µA.
The BOR is mandatory to ensure a proper functionality of the product at power-down, to
cover a supply voltage area between V
Note: The BOR is available on STM8L15x devices only.
min. and V
DD
PDR
.
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AN3147 Clock management
3 Clock management
3.1 STM8L101xx clock system overview
The 16 MHz high speed internal RC oscillator (HSI) is the only clock source that can be
used to drive the system clock.
The 38 kHz low speed internal RC oscillator (LSI) is only used to supply the auto-wakeup
unit (AWU) and watchdog.
Each peripheral clock can be switched on or off independently, in order to optimize power
consumption when the peripheral is not used. This is done by using the peripheral clock
gating (PCG) feature. See the “Clock control” section of the STM8L101xx reference manual
(RM0013) for more details.
3.2 STM8L15x clock system overview
Several different clock sources can be used to drive the system clock, depending on the
product and package you use:
● 1-16 MHz high speed external clock from the crystal oscillator (HSE crystal)
● Up to 16 MHz high speed external clock provided by the user (HSE bypass)
● 16 MHz high speed internal RC oscillator (HSI)
● 32.768 kHz low speed external crystal oscillator (LSE)
● 38 kHz low speed internal RC oscillator (LSI)
Each clock source can be switched on or off, depending on the actual needs of the
application. Each peripheral clock can be switched on or off independently, in order to
optimize power consumption when it is not used. This is done by using the peripheral clock
gating (PCG) feature. See the ‘Clock control’ section in the STM8L15x reference manual
(RM0031) for more details.
Several clock sources can be enabled in one time. The following table shows the main
features of each clock source. STM8L devices offer a complete range of clock sources to
meet customer application requirements in terms of cost, accuracy and consumption.
Doc ID 17035 Rev 1 7/10
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