AN3127
Application note
CEC networking using STM32F100xx value line microcontrollers
Introduction
STM32F100xx value line microcontrollers feature a high-definition multimedia interface consumer electronics control (HDMI™-CEC) controller peripheral that supports the HDMICEC v1.3a protocol. The HDMI-CEC controller provides a hardware support of this protocol, and it supports the whole set of features offered with CEC devices.
This application note describes the CEC protocol software and hardware implementation based on the HDMI-CEC controller. A real application example is also provided to illustrate the software implementation.
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www.st.com
Contents |
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Contents
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High-definition multimedia interface, consumer |
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electronics control (HDMI-CEC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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1.1 |
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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1.2 |
Frame description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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1.3 |
Bit timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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1.4 |
Device connectivity and addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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1.4.1 CEC communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.4.2 Enhanced DDC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.4.3 Hot plug detect (HPD) signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 1.4.4 Physical address discovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 1.4.5 Discovery algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 1.4.6 Logical addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 1.4.7 Logical address allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
1.5 STM32F100xx’s HDMI-CEC controller . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
1.5.1 Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 1.5.2 HDMI-CEC advanced features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
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Hardware environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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HDMI connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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2.1.1 I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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Hardware connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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Firmware description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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Package directories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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Firmware architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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Value line evaluation board CEC demonstration . . . . . . . . . . . . . . . . . |
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CEC demonstration overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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Device type selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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Physical address discovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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Logical address allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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Checking the connected devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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Displaying CEC send/receive information on the LCD . . . . . . . . . . . . . . . |
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Contents |
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4.6.1 Receive information subscreen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 4.6.2 Send information subscreen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
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Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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List of tables |
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List of tables
Table 1. Logical addresses. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 2. HDMI connector pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 3. STM32F100xx and HDMI-CEC connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 4. High-level functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 5. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
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List of figures |
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List of figures
Figure 1. CEC frame format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 2. Message structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 3. Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 4. Bit timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 5. Follower acknowledge (ACK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 6. CEC and DDC line connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 7. Addresses within a HDMI cluster . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 8. Physical address discovery algorithm. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 9. System exits Stop mode when data reception starts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 10. HDMI cable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 11. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 12. Electrical schematic proposal for STM32100B-EVAL. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 13. Electrical schematic proposal for STM32100E-EVAL. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 14. Example of a hardware connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 15. Package directory structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 16. Firmware architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 17. CEC demonstration flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 18. Device type selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 19. Physical and logical addresses display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 20. CEC menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 21. Receive flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 22. Receive information subscreen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 23. Send flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 24. Select CEC command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
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Glossary of terms
Broadcast message: a message sent to logical address 15 that all devices are expected to receive.
Destination: the target device for a CEC message.
Follower: a device that has just received a CEC message and is required to respond to it.
Initiator: the device that is sending, or has just sent, a CEC message and, if appropriate, is waiting for a follower to respond.
Logical address: a unique address assigned to each device.
Menu-providing device: a non-display device that may render a menu on TV.
Playback device: a device that has the ability to play media, like a DVD player.
Recording device: a device that has the ability to record a source such as an internal tuner or an external connection.
Source device: a device that is currently providing an AV stream via HDMI.
Tuner device: a device that contains a tuner, e.g. an STB (set-top box) or a recording device.
TV: a device with a HDMI input that has the ability to display the input HDMI signal. Generally it has no HDMI output.
CEC: consumer electronics control.
DDC: display data channel.
E-DDC: enhanced display data channel.
EDID: extended display identification data.
E-EDID: enhanced extended display identification data.
HDMI: high-definition multimedia Interface.
(HDMI) source: a device with a HDMI output.
(HDMI) sink: a device with a HDMI input.
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High-definition multimedia interface, consumer electronics control (HDMI-CEC) |
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1High-definition multimedia interface, consumer electronics control (HDMI-CEC)
Consumer electronics control (CEC) is the appendix supplement 1 to the HDMI (highdefinition multimedia interface) standard.
It is a protocol that provides high-level control functions between all of the various audiovisual products in a given environment. It is specified to operate at low speeds with minimum processing and memory overhead.
For more details, refer to the high-definition multimedia interface specification available from www.hdmi.org.
The CEC bus is a single-wire protocol that can connect up to 10 audiovisual devices through standard HDMI cabling.
All transactions on the CEC line consist of an initiator and one or more followers. The initiator is responsible for sending the message structure and the data. The follower is the recipient of any data and is responsible for setting any acknowledgement bits.
A message is conveyed in a single frame that consists of a start bit followed by a header block and, optionally, an opcode and a variable number of operand blocks. Figure 1 shows a CEC frame format.
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Example of Header block:
Initiator address = 0x6
Destination address = 0xD
Header block
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Example of Data block:
Data = 0xE5
Data block
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Figure 2. |
Message structure |
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Figure 3. Blocks |
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(EADER BLOCK |
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All these blocks are made of an 8-bit payload (most significant bit transmitted first) followed by an end-of-message (EOM) bit and an acknowledge (ACK) bit.
The EOM bit is set in the last block of a message and kept cleared in all others. If a message contains additional blocks after the EOM, these blocks should be ignored. The EOM bit may be set in the header block to “ping” other devices and make sure that they are active.
The acknowledge bit is always brought to high impedance by the initiator. It can therefore be driven low by either the follower that has read its own address in the header, or the follower that needs to reject a broadcast message.
The header consists of the source logical address field, and the destination logical address field. Note that the address 0xF is specially used for broadcast messages.
The format of the start bit is unique and identifies the start of a message. It should be validated by its low duration and its total duration.
All remaining data bits in the message, after the start bit, have a consistent timing. The high- to-low transition at the end of the data bit is the start of the next data bit except for the final bit where the CEC line remains high.
Figure 4 shows the timings of the start bit and the different data bits.
MS MS |
3TARTTBIT |
MS MS |
HIGH IMPEDANCE |
LOWWIMPEDANCE |
$ATA BIT ).)4)!4/2 LOGICAL
HIGH IMPEDANCE
MS MS |
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LOWWIMPEDANCE
$ATA BIT |
MS MS |
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CEC Figure 5 shows an example bit with both initiator and follower where the follower may assert the bit to logical 0 to acknowledge a data block. The initiator outputs a logical 1, thus allowing the follower to change the CEC state by pulling the control line low for the duration of the safe sample period.
MS
MS
HIGH IMPEDANCE
LOWWIMPEDANCE
$ATA BIT INITIATOR LOGICAL
MS
MS MAX
HIGH IMPEDANCE
LOWWIMPEDANCE
$ATA BIT FOLLOWER LOGICAL |
AI |
By definition the HDMI system architecture consists of sources and sinks. A given device may have one or more HDMI input(s) and output(s). Each HDMI input on the device should follow all the rules for a HDMI sink and each HDMI output should follow all the rules for a HDMI source.
The DDC is used for configuration and status exchange between a single source and a single sink. The optional CEC protocol provides high-level control functions between all of the various audiovisual products in a user’s environment.
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The enhanced DDC described in this section is defined in VESA “ENHANCED DISPLAY DATA CHANNEL STANDARD Version 1 (September 2, 1999)”. All sinks are required to support these enhanced DDC features. If the E-EDID structure of a sink is longer than 256 bytes, it should support the segment pointer.
Timing
Data is synchronized with the SCL signal and timing should comply with the Standard Mode of the I2C specification (100 kHz maximum clock rate).
The I2C bus is a standard two-wire (clock and data) serial databus protocol. Refer to the I2C specification for details.
Note that a HDMI sink may hold off the DDC transaction by stretching the SCL line during the SCL-low period following the Acknowledge bit as permitted by the I2C specification. All HDMI sources should delay the DDC transaction while the SCL line is being held low.
Data transfer protocols
The source should use I2C commands to read information from a sink’s E-EDID with a slave address.
In Enhanced DDC, a segment pointer is used to address the E-EDID outside the 256 bytes normally addressable by the 0xA0/0xA1 addresses. The Enhanced DDC protocol sets the segment pointer before the remainder of the DDC command.
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Segment pointer
Enhanced DDC allows access to up to 32 Kbytes of data. This is accomplished using a combination of the 0xA0/0xA1 address pair and a segment pointer. For each value of the segment pointer, 256 bytes of data are available at the 0xA0/0xA1 address pair. An unspecified segment pointer references the same data as when the segment pointer is zero.
Each successive value of the segment pointer allows access to the next two blocks of E- EDID (128 bytes each). The value of the segment pointer register cannot be read since it is reset at the completion of each command.
Enhanced DDC sink
The sink should be Enhanced DDC read compliant.
The sink should be capable of responding with EDID 1.3 data and up to 255 extension blocks, each 128 bytes long (up to 32 Kbytes of E-EDID memory) whenever the hot plug detect (HPD) signal is asserted.
The sink should be capable of providing E-EDID information over the Enhanced DDC channel whenever the +5 V power signal is provided. The information should be available within 20 ms after the +5 V power signal is provided.
Enhanced DDC source
The source should use Enhanced DDC protocols.
It should be capable of reading EDID 1.3 data at DDC address 0xA0.
The source reads Enhanced EDID extension data at DDC address 0xA0 using segment pointer 0x60.
A HDMI sink should not assert high voltage levels on its HPD pin when the E-EDID is not available for reading. This requirement should be fulfilled at all times, even if the sink is powered off or in standby. The HPD pin may be asserted only when the +5 V power line from the source is detected. This ensures that the HPD pin is not asserted before the third make of the connector.
A source may use a high voltage level HPD signal to initiate the reading of E-EDID data. It does not indicate whether the sink is powered, or whether the HDMI input on the sink is selected or active.
A HDMI sink should indicate any change to the contents of the E-EDID by driving a low voltage level pulse on the HPD pin. This pulse should last at least 100 ms.
In order to allow CEC to address specific physical devices, all have a physical address. The bus connectivity is worked out whenever the hot plug detect (HPD) signal is de-asserted by the physical address discovery process. That process uses only the DDC/EDID (display data channel/extended display identification data) mechanism. Starting from the CEC root device which takes address 0b0000 (normally the TV), all sinks and repeaters, whether CEC-capable or not, determine the address their source device should take, and make it available in the source address field of the EDID vendor-specific data block
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