ST AN3112 Application note

AN3112

Application note

Solution for designing a fixed off-time controlled PFC pre-regulator

with the L6564

Introduction

In this document we propose a third approach to the operation of PFC pre-regulators. In
addition to the transition mode (TM) and the fixed-frequency continuous conduction mode
(FF-CCM) operation of PFC pre-regulators, an alternative approach is offered that couples
the simplicity and affordability of TM operation with the high-current capability of FF-CCM
operation. This solution is a peak current-mode control with fixed-off-time (FOT). Design
equations are given and a practical design for a 400 W board is illustrated and evaluated.

Two methods of controlling power factor corrector (PFC) pre-regulators, based on boost
topology, are currently in use: the fixed-frequency (FF) PWM and the transition mode (TM)
PWM (fixed on-time, variable frequency). The first method employs average current-mode
control, a relatively complex technique requiring sophisticated controller ICs (e.g. the
L4981A/B from STMicroelectronics) and a considerable component count. The second uses
the more simple peak current-mode control, which is implemented with cheaper controller
ICs (e.g. the L6561, L6562, L6562A and L6564 from STMicroelectronics), and much fewer
external parts making it far more cost efficient. In the first method the boost inductor works
in a continuous conduction mode (CCM), while TM makes the inductor work on the
boundary between continuous and discontinuous mode. For a given power throughput, TM
operation involves higher peak currents compared to FF-CCM (Figure 1 and Figure 2).

Figure 1. Line, inductor, switch and diode

currents in FF-CCM PFC

Figure 2. Line, inductor, switch and diode

currents in TM PFC

This demonstration, consistent with the above mentioned cost considerations, suggests the
use of TM in a lower power range, while FF-CCM is recommended for higher power levels.

This criterion, though always true, is sometimes difficult to apply, especially for a mid-range
power level of around 150-300 W. Assessing which approach gives the better
cost/performance trade-off needs to be done on a case-by-case basis, considering the cost
and the stress of both power semiconductors and magnetics, but also of the EMI filter. At the
same power level, the switching frequency component to be filtered out in a TM system is
twice the line current, whereas it is typically 1/3 or 1/4 in a CCM system.

February 2011 Doc ID 16820 Rev 3 1/36

www.st.com

Contents AN3112

Contents

1 Introduction to FOT control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2 Operation of an FOT- controlled PFC pre-regulator . . . . . . . . . . . . . . . . 5

3 Implementing the line-modulated fixed-off-time . . . . . . . . . . . . . . . . . . 6

4 Designing a fixed-off-time PFC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4.1 Input specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4.2 Operating condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.3 Power section design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

4.3.1 Bridge rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

4.3.2 Input capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.3.3 Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.3.4 Boost inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

4.3.5 Power MOSFET selection and power dissipation calculation . . . . . . . . 16

4.3.6 Boost diode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4.3.7 L6564 biasing circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

5 Design example using the L6564-FOT PFC Excel® spreadsheet . . . . 31

6 Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

2/36 Doc ID 16820 Rev 3

AN3112 List of figures

List of figures

Figure 1. Line, inductor, switch and diode currents in FF-CCM PFC. . . . . . . . . . . . . . . . . . . . . . . . . . 1

Figure 2. Line, inductor, switch and diode currents in TM PFC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Figure 3. Basic waveforms for fixed frequency PWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Figure 4. Basic waveforms for fixed-off-time PWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Figure 5. Block diagram of an FOT-controlled PFC pre-regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 6. Circuit implementing FOT control with the L6564 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 7. ZCD pin signal with the fixed off-time generator circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 8. Switching frequency fixing the line voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 9. The effect of fixing off-time - boundary between DCM and CCM . . . . . . . . . . . . . . . . . . . . 16

Figure 10. Conduction losses and total losses in the STP12NM50FP MOSFET couples for the 400W

FOT PFC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 11. L6564 internal schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 12. Open loop transfer function-bode plot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 13. Phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 14. Multiplier characteristics family for VFF =1 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 15. Multiplier characteristics family for VFF=3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 16. Switching frequency function on the peak of the sinusoid input voltage waveform and the cor-

responding off- time value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 17. Off-time vs. input mains voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 18. Switching frequency vs. input mains voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 19. Excel spreadsheet design specification input table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Figure 20. Other design data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Figure 21. Excel spreadsheet FOT PFC schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Figure 22. Excel spreadsheet BOM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Doc ID 16820 Rev 3 3/36

Introduction to FOT control AN3112

1 Introduction to FOT control

In the output power range already mentioned, where the TM/CCM usability boundary is
uncertain, a third approach that couples the simplicity and affordability of TM operation with
the high-current capability of CCM operation may offer a solution to the problem. Generally
speaking, FF PWM is not the only alternative when CCM operation is desired. FF PWM
modulates both switch on and off-times (their sum is constant by definition), and a given
converter operates in either CCM or DCM depending on the input voltage and the loading
conditions. Exactly the same result can be achieved if just the on-time is modulated and the
off-time is kept constant, in which case, however, the switching frequency is no longer fixed
(Figure 3 and Figure 4). This is referred to as fixed-off-time (FOT) control. Peak-current­mode control can still be used.

Figure 3. Basic waveforms for fixed

frequency PWM

It is worth noting that FOT control does not need a specialized control IC. A simple
modification of a standard TM PFC controller operation, requiring just a few additional
passive parts and no significant extra cost, is all that is needed.

Figure 4. Basic waveforms for fixed-off-time

PWM

4/36 Doc ID 16820 Rev 3

AN3112 Operation of an FOT- controlled PFC pre-regulator

2 Operation of an FOT- controlled PFC pre-regulator

In Figure 5 a block diagram of an FOT-controlled PFC pre-regulator is shown. An error
amplifier (VA) compares a portion of the pre-regulator's output voltage Vout with a reference
Vref and generates an error signal V
hypothesis, is fed into an input of the multiplier block and multiplied by a portion of the
rectified input voltage V
V

, whose amplitude is proportional to that of V

CSREF

. At the output of the multiplier, there is a rectified sinusoid,

MULT

sinusoidal reference for PWM modulation. V
comparator that, on the non-inverting input, receives the voltage V
Rsense, proportional to the current flowing through the M switch (typically a MOSFET) and
the L inductor during the on-time of M. When the two voltages are equal, the comparator
resets the PWM latch, and M, supposedly already on, is switched off.

Figure 5. Block diagram of an FOT-controlled PFC pre-regulator

proportional to their difference. VC, a DC voltage by

C

and to VC, which represents the

MULT

is fed into the inverting input of a

CSREF

on the sense resistor

CS

As a result, V

determines the peak current through M and the L inductor. As V

CSREF

CSREF

is
a rectified sinusoid, the inductor peak current is also enveloped by a rectified sinusoid. The
line current Iin is the average inductor current that is the low-frequency component of the
inductor current resulting from the low-pass filtering operated by the EMI filter. The PWM
latch output Q going high activates the timer that, after a predetermined time in which T

OFF

has elapsed, sets the PWM latch, therefore turning M on and starting another switching
cycle. If T

is such that the inductor current does not fall to zero, the system operates in

OFF

CCM. It is apparent that FOT control requires nearly the same architecture as TM control,
the only change is the way the off-time of M is determined. It is not a difficult task to modify
externally the operation of the standard TM PFC controller so that the off-time of M is fixed.

For the controller, we refer to the L6564 [4]. For a more detailed and complex description of
the fixed off-time technique and in particular the line modulated FOT, please refer to [5].

Doc ID 16820 Rev 3 5/36

Implementing the line-modulated fixed-off-time AN3112

3 Implementing the line-modulated fixed-off-time

The circuit that implements LM-FOT control with the L6564 PFC controller is shown in

Figure 6. During the on-time of the MOSFET the gate voltage V

forward biased and the voltage at the ZCD pin is internally clamped at V
typ.). During the MOSFET off-time V

is low, diode D is reverse-biased and the voltage at

GD

the pin decays with an exponential law until it reaches the triggering threshold (V

0.7 V typ.) which causes the switch to turn on. The time needed for the ZCD voltage to go
from V

ZCDclamp

time, or T

(clamping level) to V

.

OFF

ZCDtrigger

(trigger level) defines the duration of the off-

Figure 6. Circuit implementing FOT control with the L6564

= 15 V is high, diode D is

GD

ZCDclamp

(5.7 V

ZCDtrigger

~

The circuit in Figure 6. makes T

a function of the RMS line voltage thanks to the peak

OFF

holding effect of T1 (which acts as a buffer) along with R and C whose time constant is
significantly longer than a line half-cycle. With the addition of R0 and T1, as long as the
voltage on the ZCD pin during T

is above V

OFF

mult+VBE

following the law:

Equation 1

As V’

′

(t) falls below V

ZCD

⎡
⎢

⎣

V)t(V

ZCDclampZCD

mult+VBE

R

()

−=
+

RR

0

+⋅

, T1 is cut off and C is discharged through R only, so that its

evolution from that point on is described as:

Equation 2

′′

ZCD

V'

(t) decreases from V

ZCD

6/36 Doc ID 16820 Rev 3

ZCDclamp

R

)t(V

=

RR

+

0

= 5.7 V to V

()

−

⎤

eVV

⎥

BEmult

⎦

mult+VBE

, C is discharged through R and R0,

)RR(t

+⋅

0

()

⋅

0

eVV

⋅+⋅

BEmult

R

CRR

+⋅

t

−

CR

⋅

()

RR

+

0

VV

+⋅

BEmult

in the following time period t':

AN3112 Implementing the line-modulated fixed-off-time

Equation 3

⎤
⎥

⋅+−+⋅

RVV)RR(V

⎥

BEmult0ZCDclamp

⎦

and V''

′

t

(t) decreases from V

ZCD

⋅

RR

0

−=
+

RR

0

⎡

⋅⋅

lnC

⎢
⎢

⎣

mult+VBE

to V

()

⋅+

RVV

0BEmult

()

ZCDtrigger

= 0.7 V (trigger level) in the following

time period t'':

Equation 4

Figure 7

V

⎡

′′

⋅−=

lnRCt

⎢

ZCDtrigger

⎣

illustrates the signal on the ZCD pin with the two discharging time constants

⎤
⎥

+

VV

BEmult

⎦

depending on the two resistors R, R0 and the L6564 parameters, particularly the upper
clamp voltage and the triggering voltage of the ZCD pin.

Figure 7. ZCD pin signal with the fixed off-time generator circuit

The sum of the two time periods is the off-time function:

Equation 5

OFF

⎡

R

⎢

RCT

⋅−=

+

⎢

⎣

⎡

0

ln

⋅

⎢

RR

⎢

0

⎣

()

RVV

⋅+

0BEmult

()

In this way, once the multiplier operating point (that is, the V
proper selection of R and R0, it is possible to increase T
maximum line voltage, it is always T
L6564 gate drive [

4]. This is a required condition in order to avoid line distortion [5].

Doc ID 16820 Rev 3 7/36

ON>TONmin

, where T

OFF

ONmin

⎤
⎥

RVV)RR(V

⋅+−+⋅

⎥

BEmult0ZCDclamp

⎦

/VAC ratio) is fixed, with the

mult

V

⎛

ZCDtrigger

⎜

+

ln

⎜

()

⎝

+

⎤

⎞
⎟

⎥

⎟

VV

⎥

BEmult

⎠

⎦

with the line voltage so that, at

is the minimum on-time of the

Implementing the line-modulated fixed-off-time AN3112

It is easy to see that T
technique as line-modulated fixed-off-time (LM-FOT) [

is now a function of the instantaneous line voltage. We refer to this

OFF

5].

This modification, although simple, introduces profound changes in the timing relationships,
with a positive influence on the energetic relationships. From the control point of view,
modulating T

is a feed-forward term that modifies the gain but does not change its

OFF

characteristics. Consequently, all of the properties of the standard FOT control are
maintained. Due to the highly non-linear nature of the T

modulation introduced by T1

OFF

and R0, its effects are discussed only qualitatively and the quantitative aspects are provided
graphically for a specific case in [

5].

As a practical rule, it is convenient to first select a capacitor and then to calculate the resistor
needed to achieve the desired T

As the gate voltage V
possible up to V

ZCDclamp

rises, the Rs resistor charges the C timing capacitor as quickly as

GD

, without exceeding the clamp rating (I

(see Section 4.3.7 on page 19).

OFF

=10 mA). Then it must

ZCDx

fulfill the following inequalities:

Equation 6

where V

−−

VVV −−

FZCDclampGDx

V

ZCDclamp

+

I

ZCDx

(assume VGD = 10 V) is the voltage delivered by the gate driver, V

GD

R

RRs

⋅<<

V

ZCDclamp

VVV

FZCDclampGD

= 15 V its

GDx

maximum value, and VF the forward drop on D.

When working at high line/light load the on-time of the power switch becomes very short and
the Rs resistor alone is no longer able to charge C up to V

ZCDclamp

. The speed-up capacitor
Cs is then used in parallel to Rs. This capacitor causes an almost instantaneous charge of C
up to a certain level, after that, Rs completes the charge up to V

ZCDclamp

. It is important that
the steep edge caused by Cs does not reach the clamp level, otherwise the internal clamp of
the L6564 undergoes uncontrolled current spikes (limited only by the dynamic resistance of
the 1N4148 and the ESR of Cs) that could overstress the IC. Cs must then be:

Equation 7

V

CCs−−<

ZCDclamp

VVV

FZCDclampGDx

8/36 Doc ID 16820 Rev 3

AN3112 Designing a fixed-off-time PFC

4 Designing a fixed-off-time PFC

4.1 Input specification

The following is a possible design procedure for a fixed-off-time mode PFC using the L6564.
This first part is a detailed specification of the operating conditions of the circuit that is
needed for the calculations in
range mains PFC circuit is considered. Some design criteria are also given.

Section 4.2 on page 11. In this example a 400 W, wide-input

● Mains voltage range (Vac rms): (1)

● Minimum mains frequency: (2)

● Rated output power (W): (3)

out

min

Hz47fl=

=

Vac90VAC

=

max

W400P

Vac265VAC

=

Because the PFC is a boost topology the regulated output voltage depends strongly on the
maximum AC input voltage. In fact, for correct boost operation the output voltage must
always be higher than the input and therefore, as Vin max is V

, the output has been set at

pk

400 Vdc as the typical value. In cases where the maximum AC input voltage VACmax is
higher than 265 V, as typical in ballast applications, the output voltage must be set higher
accordingly. As a rule of thumb the output voltage must be set 6/7% higher than the
maximum input voltage peak.

● Regulated DC output voltage (Vdc) (4)

out

=

V400V

The target efficiency and PF are set here at minimum input voltage and maximum load.
They are used for the following operating condition calculation of the PFC. Of course at high
input voltage there is higher efficiency.

P

● Expected efficiency (%): (5)

● Expected power factor: (6)

out

P

in

%90

==η

99.0PF =

Because of the narrow loop voltage bandwidth, the PFC output may experience
overvoltages at startup or in the case of load transients. To protect from excessive output
voltages that can overstress the output components and the load, in the L6564, a device pin
(PFC_OK, pin #6) has been dedicated to monitor the output voltage with a separate resistor
divider, selected so that the voltage at the pin reaches 2.5 V if the output voltage exceeds a
preset value (Vovp) larger than the maximum Vout that can be expected, also including
worst-case load/line transients.

Doc ID 16820 Rev 3 9/36

Designing a fixed-off-time PFC AN3112

● Maximum. output voltage (Vdc): (7)

OVP

=

V430V

The mains frequency generates a 2fL voltage ripple on the output voltage at full load. The
ripple amplitude determines the current flowing into the output capacitor and the ESR.
Additionally, a certain hold-up capability in case of mains dips can be requested from the
PFC in which case the output capacitor must also be dimensioned, taking into account the
required minimum voltage value (Vout min) after the elapsed hold-up time (t

Hold

).

● Maximum output low frequency ripple: (8)

● Minimum output voltage after line drop (Vdc): (9)

ms20t

● Hold-up capability

Hold

=

out

V10V

=∆

V300V

=

minout

(10)

(ms):

The PFC minimum switching frequency is one of the main parameters used to dimension
the boost inductor. Here we consider the switching frequency at low mains on top of the
sinusoid and at full load conditions. As a rule of thumb, it must be higher than the audio
bandwidth in order to avoid audible noise and additionally it must not interfere with the
L6564 minimum internal starter period, as given in the datasheet. Alternatively, if the
minimum frequency is set too high the circuit shows excessive losses at higher input voltage
and probably operates skipping switching cycles not only at light load. The typical minimum
frequency range is 55÷95 kHz for wide range operation.

● Minimum switching frequency (kHz) (11)

minsw

kHz80f

=

The design is done on the basis of a ripple factor (the ratio of the maximum current ripple
amplitude to the inductor peak current at minimum line voltage) kr=0.34.

● Ripple factor (12)

In order to properly select the power components of the PFC and dimension the heat sinks
in case they are needed, the maximum operating ambient temperature around the PFC
circuit must be known. Please note that this is not the maximum external operating
temperature of the entire equipment, but it is the local temperature at which the PFC
components are working.

● Maximum ambient temperature (°C): (13)

10/36 Doc ID 16820 Rev 3

ambx

34.0kr=

C50T

°=

AN3112 Designing a fixed-off-time PFC

4.2 Operating condition

The first step is to define the main parameters of the circuit, using the specification points
given in

Rated DC output current:

Equation 8

Section 4.1 on page 9:

I =

out

P

out

I

out

V

out

W400

V400

A00.1

==

Maximum input power:

Equation 9

P

out

=

P

in

P

in

η

90

W400

=⋅=

W44.444100

Referring to the main currents shown in Figure 1, the following formula expresses the
maximum value of current circulating in the boost cell which means at minimum line voltage
of the selected range:

RMS input current:

Equation 10

P

I

=

in

out

min

I

=

in

PFVAC

⋅

W400

99.0Vac90

⋅

A99.4

=

It is important to define the following ratios in order to continue describing the energetic
relationships in the PFC:

Equation 11

min

2k =

Equation 12

VAC

max

2k =

From Equation 11 and Equation 12:

Line peak current:

Equation 13

I

maxPK

⋅

=

Inductor Ripple-∆ILpk:

Doc ID 16820 Rev 3 11/36

VAC

V

V

out

P2

in

Vk

⋅

outmin

out

min

max

Vac90

min

max

I

maxPK

2k

Vac265

2k

⋅

=

⋅

32.0

==

V400

94.0

==

V400

W44.4442

V40032.0

A98.6

=