ST AN3107 APPLICATION NOTE

ESD immunity-level optimization of a high-side switch
Introduction
AN3107
Application note
application based on the VNI4140K
The VNI4140K is a quad-channel high-side driver designed for industrial applications. It is a monolithic device manufactured using STMicroelectronics’ most advanced VIPower technology, intended for driving four independent resistive or inductive loads with one side connected to ground. The device fully complies with standards including JEDEC (JESD22) and IEC 61131-2. It conforms to the “human body model” ESD test in accordance with the JESD22-A114 definition. The immunity level is 2000 V, as stated in the datasheet of the device.
When the VNI4140K is mounted in the complete application, the system must meet minimum requirements defined by generic standard IEC 61000-4-2. However, the actual immunity level depends on the manufacturer of the final application. To achieve the required level of immunity, the device must be equipped with a suitable application environment, external components and/or a suitable PCB layout.
This application note provides some recommendations on how to optimize the ESD immunity level of the VNI4140K high-side switch application in accordance with the IEC 61000-4-2 standard.

Figure 1. VNI4140K ESD optimized PCB example

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Contents AN3107
Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Test setup according to IEC 61000-4-2 . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Test conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 Classification of the test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Application solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1 Cap filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2 Π filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.3 Dual LC filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
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AN3107 List of tables
List of tables
Table 1. Application immunity with C filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 2. Application immunity with Π filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 3. Application immunity with dual LC filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 4. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
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List of figures AN3107
List of figures
Figure 1. VNI4140K ESD optimized PCB example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 2. ESD test setup according to IEC 61000-4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Application schematic diagram with capacitive filter protection . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Example of a spiral PCB inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 5. Midi Spring inductors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 6. Application schematic diagram with Π filter protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 7. Application schematic diagram with dual LC filter protection . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 8. Test board views. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
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AN3107 Test setup according to IEC 61000-4-2

2 Test setup according to IEC 61000-4-2

The IEC 61000-4-2 standard provides the test procedure for various types of applications. The test setup for ungrounded (tabletop) equipment is selected. The structure is shown in
Figure 2.

Figure 2. ESD test setup according to IEC 61000-4-2

2.1 Test conditions

Supply voltage: 24 VDC, always ON
Inputs OFF, outputs OFF
Air discharge
Polarity: positive/negative
Discharge unit: 150 pF / 330 Ω
Applied to: board output terminal

2.2 Classification of the test

A - normal performance
B - temporary degradation or loss of function or performance, with automatic return to
normal operation
C - temporary degradation or loss of function which requires external intervention to recover
normal operation
D - degradation or loss of function, need substitution of damaged components to recover
normal operation.
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Application solutions AN3107

3 Application solutions

Ideas (application environment) on how to optimize the immunity of the device are listed in
Section 3.1, Section 3 .2 and Section 3.3.

3.1 Cap filters

This basic configuration uses 22 nF ceramic capacitors connected between the device outputs and ground. It protects the VNI4140K primarily against radio-frequency and fast transient disturbances.
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AN3107 Application solutions

Figure 3. Application schematic diagram with capacitive filter protection

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Application solutions AN3107
With this basic configuration, application immunity is limited in the case of a negative ESD pulse of -8 kV (air discharge), as listed in Tabl e 1.

Table 1. Application immunity with C filters

Test signal level
3.2 Π filters
Improved results are achieved when using Π LC filters at the VNI4140K outputs. Measurements show the best results with 22 nF ceramic capacitors and approximately 82 nH inductors. The inductor can be implemented either as a “spiral” directly on the PCB substrate, or placed as a discrete component.
If, based on available space, the inductor is implemented as a “spiral” directly on the PCB substrate, the cost of a discrete conductor is saved. An example is shown in Figure 4.
The discrete inductor should be a wire-wound, air-core type if possible. Ferrite-based inductors did not produce positive results. An example of a suitable component is the 1812SMS-82NJLB, Midi Spring
Polarity / result criteria
[kV]
2BB
4BB
6BB
8BD
10 B D
12 B D
Air Core inductor from Coilcraft.
+–

Figure 4. Example of a spiral PCB inductor

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AN3107 Application solutions

Figure 5. Midi Spring inductors

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Application solutions AN3107
Figure 6. Application schematic diagram with Π filter protection
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AN3107 Application solutions
The results in Table 2 are achieved employing Π LC filters. This configuration appears to be a satisfactory compromise between the PCB space occupied, component cost and application immunity, which is notably improved. In this case, the application withstands air discharges up to -14 kV without silicon degradation or damage (using the Midi Spring inductors).
Table 2. Application immunity with Π filters
Polarity / result criteria
(1)
Test signal level [kV]
8BB
10 B B
12 B B
14 B B / D
15 B D
16 B
1. The results shown are based on testing with Midi Spring inductors.
2. Based on testing with PCB inductors.

3.3 Dual LC filters

The best performance is achieved using dual (cascade) LC filters. The schematic diagram and test results are provided in Figure 7 and Tabl e 3.
Π (LC) filter
+–
(2)
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Application solutions AN3107

Figure 7. Application schematic diagram with dual LC filter protection

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AN3107 Application solutions

Figure 8. Test board views

Table 3. Application immunity with dual LC filters

Test signal level [kV]
+—
8BB
10 B B
12 B B
14 B B
15 B B
16 B D
1. Tests performed with “spiral” PCB inductors.
An increase in immunity of approximately 3 kV can be observed compared to the Π filter configuration (with PCB inductor). Whether or not to use the dual filter is based on application requirements.
Polarity / result criteria
(1)
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Conclusion AN3107

4 Conclusion

The VNI4140K application is immune to the positive polarity of the ESD at a voltage level higher than 16 kV.
In the case of negative pulse immunity, special attention should be paid to the output filter, which slows down the ESD pulse. Three configurations have been tested.
The dual LC filter (cascade connection) structure is highly immune but requires more space on the PCB. A level of -15 kV without silicon degradation was achieved.
The configuration using Π filters provides a good compromise between the immunity and PCB space in this implementation. A level of -14 kV (using Midi Spring inductors) / -12 kV (PCB inductors) without silicon degradation was achieved.
The basic device connection with a single ceramic capacitor at each output provides robustness against -6 kV ESD pulses.
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AN3107 References

5 References

1. VNI4140K device datasheet
2. AN2684 - STEVAL-IFP006V1: designing with VNI4140K quad high-side smart power solid-state relay ICs
3. AN2208 - Designing Industrial Applications with VN808/VN340SP High-side Drivers
4. AN1351 - VIPower AND BCDmultipower: making life easier with ST's high side drivers
5. IEC61000-4-2 Electrostatic discharge
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Revision history AN3107

6 Revision history

Table 4. Document revision history

Date Revision Changes
24-Mar-2010 1 Initial release.
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AN3107
y
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Doc ID 16783 Rev 1 17/17
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