This application note is intended for hardware developers that are using the SPEAr3xx
embedded MPU in their target design.
IBIS models are mandatory to run signal integrity simulation in the application PCB. PCB
simulation is very important to make sure that the layout of the PCB does not introduce any
functional problems or timing marginality in high speed interfaces like DDR2.
The IBIS models provided for SPEAr3xx are organized in a model library containing several
models for each I/O pin (or for a functional group of I/Os). Each I/O pin or functional group of
I/O has a set of models; each model corresponds to a certain operating mode of the I/O
pads.
The operating modes are programmable and are defined by a proper setting of two registers
of the SPEAr3xx device (for more details please refer to the miscellaneous registers and
DDR memory controller sections of the SPEAr3xx user manual).
This document explains how to extract the correct model from the library sp300_v3.ibs after
reading the register setting or knowing the operating mode.
December 2009Doc ID 16605 Rev 11/13
www.st.com
PL_CLK & PL_GPIO IBIS model selectionAN3099
1 PL_CLK & PL_GPIO IBIS model selection
The I/O signals of the PL_CLK & PL_GPIO interface form two main groups.
Please refer to the following table for the I/O signals and the associated model name.
Table 1.Relation between the PL_.... block signals and the used model
Note:In Bold the fixed bx bit values for the STM DDR2 application board.
Figure 2.CLKP signal simulation case (for example) with the HyperLynx tool
As shown in Figure 2, if the simulation tool supports the model selector function, it’s pretty
easy to select the right model. When you select the pin name of the package (ball name) to
be used in the simulation, the tool points automatically to the signal name and shows the
model group name, listing in a window all the models contained in the group. As you can see
in the model selector windows, all the models with all the available combination of the 7 or 8
bits are presented.
Knowing the operational mode or the content of the two registers explained in the previous
paragraph, you can select the right model to be used by the simulation. In this specific
example the selected model is BDCLK_R_IN_11000110.
There are simulation tools that do not support the model selector function. In this case, you
must probably manually remove from the IBIS model library all the models with the bit
settings that are not used in the simulation, only leaving in the library the models with the
combination of bits related to the used operating mode.
10/13Doc ID 16605 Rev 1
AN3099USB IBIS model selection
3 USB IBIS model selection
All the I/O signals of the USB interface are grouped in one main group.
Please refer to the following table for the I/O signals and the associated model name.
Table 5.Relation between the USB block signals and the used model
GMAC block signal nameIBIS model group name
USB_DEVICE_DP
USB_DEVICE_DM
USB_HOST0_DP
USB_HOST0_DM
USB_HOST1_DP
USB_HOST1_DM
Caution:The USB IBIS model of the library sp300_v3.ibs is for the typical case only.
usb_tx
Doc ID 16605 Rev 111/13
Revision historyAN3099
4 Revision history
Table 6.Document revision history
DateRevisionChanges
04-Dec-20091Initial release.
12/13Doc ID 16605 Rev 1
AN3099
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