ST AN3040 APPLICATION NOTE

AN3040

Application note

STEVAL-ILB008V1 4 x 18 W/T8 ballast driven by L6585DE

Introduction

This application note describes a demonstration board able to drive a 4 x 18 W linear T8 fluorescent tubes.

The ballast is controlled by the new L6585DE IC that integrates the PFC and half-bridge control circuits, relevant drivers, and the circuitry that manages all the operating phases (preheating, ignition and run mode) of the lamp. Protections against failures such as lamp disconnection, anti-capacitive mode and PFC overvoltage are guaranteed and obtained with a minimum number of external components. In addition to the description of the circuit and design criteria, this document provides a short overview of the ballast performances.

Fluorescent lamps are driven more and more by electronic ballasts rather than by electromagnetic ballasts, primarily because fluorescent lamps can produce around 20% more light for the same input power when driven above 20 kHz instead of 50/60 Hz. Operation at this frequency also eliminates both light flickering (the response time of the discharge is too slow for the lamp to have a chance to extinguish during each cycle) and audible noise. Electronic ballasts consume less power and therefore dissipate less heat than electromagnetic ballasts. The energy saved can be estimated in the range of 20-25% for a given lamp power. Finally, the electronic solution allows better control of the filament current and lamp voltage during preheating with the unquestionable benefit of increasing the average lamp life.

Figure 1. 4 x 18 W T8 ballast demonstration board

!-V

June 2010

Doc ID 16181 Rev 2

1/27

www.st.com

Contents

AN3040

 

 

Contents

1

Basis of half-bridge inverter topology . . . . . . . . . . . . . . . . . . . . . . . . .

. 4

2

Main characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. 5

3

Ballast design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7

 

3.1

L6585DE pin-by-pin biasing circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7

 

3.2

PFC power section design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

12

3.2.1 Input capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.2.2 Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.2.3 Boost inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.2.4 Power MOSFET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.2.5 Boost diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3.3 Design of the half-bridge inverter and choice of preheating inductor . . . . 14

4

Experimental results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

15

 

4.1

Start sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

15

 

4.2

Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

17

 

4.3

Conducted emissions test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

18

 

4.4

Guidelines for connecting the four lamps to the ballast . . . . . . . . . . . . . .

20

5

Automatic restart circuit for lamp replacement . . . . . . . . . . . . . . . . . .

21

6

Bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

22

7

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

26

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Doc ID 16181 Rev 2

AN3040

List of figures

 

 

List of figures

Figure 1. 4 x 18 W T8 ballast demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Figure 2. Electrical architecture used for four-lamp electronic ballasts . . . . . . . . . . . . . . . . . . . . . . . . 4 Figure 3. Electrical schematic 4 x 18 W T8 - main wide range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 4. EOL circuit for first-series lamp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 5. L6585DE startup sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 6. One lamp ignition phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 7. Lamp voltage and current in run mode condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 8. Run mode, rectifying effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 9. Ignition phase with broken lamps: case 1 (lamp 1 works, lamp 2 is broken, lamp 3 is

broken, lamp 4 works) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 10. Ignition phase with broken lamps: case 2 (lamp 1 is broken, lamp 2 works, lamp 3 is

broken, lamp 4 works) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 11. Conducted emissions at 110 Vac 50 Hz - line 1 peak detector . . . . . . . . . . . . . . . . . . . . . 19 Figure 12. Conducted emissions at 110 Vac 50 Hz - line 2 peak detector . . . . . . . . . . . . . . . . . . . . . 19 Figure 13. Conducted emissions at 230 Vac 50 Hz - line 1 peak detector . . . . . . . . . . . . . . . . . . . . . 19 Figure 14. Conducted emissions at 230 Vac 50 Hz - line 2 peak detector . . . . . . . . . . . . . . . . . . . . . 20 Figure 15. Connecting four lamps to the ballast . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 16. Automatic restart circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Doc ID 16181 Rev 2

3/27

Basis of half-bridge inverter topology

AN3040

 

 

1 Basis of half-bridge inverter topology

The half-bridge inverter operates in zero voltage switching (ZVS) resonant mode to reduce the switching losses and the electromagnetic interference generated by the output wiring and the lamp. Voltage-fed, series-resonant, half-bridge inverters are currently used for compact fluorescent lamp (CFL) ballasts and for many european tube lamp (TL) ballasts.

For this circuit, we have chosen a lamp-to-ground configuration with current preheating and have implemented two parallel resonant circuits that each supply two lamps in series, as shown in Figure 2.

Figure 2. Electrical architecture used for four-lamp electronic ballasts

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!-V

4/27

Doc ID 16181 Rev 2

AN3040

Main characteristic

 

 

2 Main characteristic

The electrical specifications of the lamp ballast are shown in Table 1.

Table 1.

Input and output parameter

 

 

 

Input parameters

 

 

 

 

 

 

 

VIN

Input voltage range

 

85 to 265 VRMS

 

fline

Line frequency

 

50/60 Hz

 

 

Tube lamp

 

 

 

 

 

 

 

Number

4

 

 

 

 

 

 

Type

T8

 

 

 

 

 

 

Power

18 W

 

 

 

 

 

 

 

 

Expected output parameters

 

 

 

 

 

 

 

PF

Power factor

 

≥0.9

 

 

 

 

 

 

THD%

Total harmonic distortion

 

≤10

 

 

 

 

 

 

η %

Efficiency

 

≈90

 

 

 

 

 

Doc ID 16181 Rev 2

5/27

ST AN3040 APPLICATION NOTE

Main characteristic

Figure 3. Electrical schematic 4 x 18 W T8 - main wide range

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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AN3040

!-V

6/27

Doc ID 16181 Rev 2

AN3040

Ballast design

 

 

3 Ballast design

This sections describes the main components of the circuit.

3.1L6585DE pin-by-pin biasing circuitry

Designed in high-voltage BCD offline technology, the L6585DE embeds a PFC controller, a half-bridge controller, the relevant drivers and the logic necessary to build an electronic ballast.

Pin1 OSC is one of the two oscillator inputs. The value of the capacitor connected to

ground defines the half-bridge switching frequency in each operating state. C5 is set to 1 nF.

Pin2 RF: the choice of component and oscillator capacitance defines the half-bridge

switching frequency in each operating state. A resistor R14 connected to ground sets the run frequency, while during the preheating phase the switching frequency is set by

the parallel of the above resistance with the R13 resistor connected between the RF and EOI pins (the EOI pin is pulled to ground during preheating).

With the following frequencies and ignition time:

frun = 40kHz fpre = 67kHz tign = 45 ms R14 can be calculated with the following formula.

Equation 1

e =1−

1.33

k =

499.6 103

 

 

k

1/ e

 

 

 

 

 

R14

 

 

 

= 33 kΩ

(C5 )0.581

 

 

 

 

(C

 

)0.872

 

 

 

5

= f

 

 

 

 

 

 

 

 

run

 

The value of R13 is therefore given by:

Equation 2

 

 

k

1/ e

 

 

R //R

=

 

 

R

= 47 kΩ

 

13 14

f

 

13

 

 

pre

 

 

Pin3 EOI is a multi-function pin. During preheating, the pin is internally shorted to ground by the logic, so the resistor (Rpre//Rrun) connected between the RF pin and ground sets the preheating switching frequency. During ignition it goes into a high impedance state: the ignition time is the time necessary for the pin voltage to -

exponentially - rise from zero to 1.9 V. The growth is steered by the C6*R13 time constant; since the value of R13 has already been calculated and tign at the start is fixed, C6 is calculated with the following formula.

Equation 3

C6

=

 

tign

= 319 nF

 

 

 

3

R13

For this circuit, C6 has been set to 320 nF.

Doc ID 16181 Rev 2

7/27

Ballast design

AN3040

 

 

Pin4 TCH is the time counter and is activated during the preheating phase as well as after a protection is triggered (HBCS crossing during ignition run mode, window

comparator at EOL). To achieve this, an R15C7 parallel network is connected between this pin and ground. With a protection time tTch,reduced fixed at 0.27 seconds (needed for the startup sequence with old or damaged lamps), C7 can then be calculated.

Equation 4

tTch,reduced C7 0.26974 106 C7 =1μF

With tpre set to 1 second and considering the internal current generator ICH = 31 µA, R15 can be calculated.

Equation 5

 

tpre

C7

 

4.63

 

ICH

 

R15 =

 

 

 

 

= 755 kΩ 750 kΩ

C7 ln

4.63

 

 

 

 

 

 

 

 

 

 

1.5

 

 

Pin5 EOLP is a 2 V reference and allows programming the window comparator of Pin6 (EOL) according to the values defined in Table 4 in the L6585DE datasheet. Working in a lamp-to-ground configuration, a fixed reference mode has been selected, and for a window voltage amplitude of ± 240 mV, R16 has been set to 75 kΩ.

Pin6 EOL is the input of the window comparator. Concerning this comparator, the fixed reference configuration requires two Zener diodes to shift the mean value of the lamp voltage to 2.5 V. The values of the two Zener diodes relate to the symmetry of the protection intervention, and the best symmetry is obtained by choosing two values whose difference is equal to twice the reference voltage.

Referring to the first series lamp (Figure 3):

Equation 6

VK max = 2.5 + VzD16 + VfD17 + W2

VK min = 2.5 −(VzD17 + VfD16 )− W2

VK max = −VK min 2 2.5 = VzD17 −VzD16 VzD17 = 5.1V,VzD16 =10 V

If we consider that VfD17 = VfD16 = 0.7 V and take into account that W/2 = 0.240 V, the maximum/minimum voltage on the low resistance of the voltage divider of the lamp is

VK = 8.2V .

With R67 equaling 1.8 MΩ, considering the current capability of EOL and fixing the maximum deviation voltage lamp Vlamp = 18V , the value of R60 can be calculated as 1.5 MΩ.

8/27

Doc ID 16181 Rev 2

AN3040

Ballast design

 

 

Figure 4. EOL circuit for first-series lamp

The same design procedure can be used for the EOL circuit of the second series lamp.

Pin7 CTR is a multi-function pin (PFC overvoltage, feedback disconnection, reference for EOL in case of tracking reads), connected through a resistive divider to the PFC output bus. By establishing a maximum PFC overvoltage (PFC output overshoot, for

example, at startup) VOVPBUSpfc of 480 V and considering that the corresponding

threshold on the CTR pin (VthrCTR) must be 3.4 V, R7+R12 can be calculated as 1.82 MΩ and R19 as 13 kΩ.

Pin8 MULT: first, the maximum peak value for VMULT, VMULTmax is selected. This value, which is reached at the maximum mains voltage, should be 3 V (linearity limit) or nearly

so in wide-range mains and less in case of single mains. The PFC sense resistor selected is RS = R22 = 0.150 Ω and is described in the section on Pin12. Considering that the maximum slope of the multiplier (maxslope) is 0.75, it is possible to calculate

the maximum peak value occurring at the maximum mains voltage and the multiplier divider ε.

Equation 7

 

 

ILpk R22

 

 

 

 

 

2 2

 

Pout

 

R22

 

 

 

 

 

 

V

 

 

 

η V

 

PF

V

 

 

V

=

 

 

 

 

ACmax

=

 

 

inmin

 

 

 

ACmax

=1.83

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MULT max

 

max slope

 

VACmin

 

 

max slope

 

 

VACmin

 

 

 

 

 

 

 

 

 

 

ε = R

R17

 

 

 

) =

VMULT max

=

1.83

= 4.89 10

−3

 

 

+ (R

5

+R

9

2 V

2

265

 

 

 

 

17

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ACmax

 

 

 

 

 

 

 

 

 

Doc ID 16181 Rev 2

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